Sporniket's log on hardware stuff

[sporniket]

This week I could capture the schematics around the MFP. I planned to put the serial port too, but this one is not just wiring to IO ports, there are specialized ICs and voltage regulation curcuitery. I also had to fix the previous subsheet, with a forgotten capacitor and the parallel port and wiring incorrectly labelled with "serial" everywhere ! :oops:

As usual, the git repository is up to date.

subsheet_202-U202 — PSG and Parallel IO.pdf

subsheet_203-U203 — MFP 68901.pdf

[sporniket]

The RS-232 port and alternate voltage generation. The "-12V" is just a hunch given that it is for the RS-232 driver. In other words, "I have no idea what I'm doing".

subsheet_204-J204 — RS-232 IO.pdf

subsheet_205-U204 U205 — G12V -12V -5V.pdf

Anyway, the sheet #2 is done, next sheet is the DMA circuitry (DMA, WD1772 and ports).

As usual, the github repository is up to date.

[sporniket]

Here is the converted schematics for the DMA IC. The original schematics is done with the DIP-40 version of chip, and my STE has the PLCC44 version. Thus, I looked at other schematics (the Mega STE and the STBooks) to also get the pinout of the plcc version. The schematics of the STBooks seems more complete to me, as the pin 30 is annotated as "TESTIN" and wired to ground, instead of being omitted in the schematics of the Mega STE.

Another thing, on my motherboard, I fail to find a second bypass capacitor, as the plcc version has 2 Vcc pins.

subsheet_300-U300 — DMA.pdf

The git repository is up to date.

[sporniket]

Next subsheet, the ACSI Port, and the associated buffer/line drivers ICs.

subsheet_301-J301 — ACSI Port.pdf

The git repository is up to date.

Also, this week I received the 4Mb SIMMs for STE made by @exxos to upgrade from 512Kb RAM.

2021-05-21--00.jpg

I had to push harder than expected to fully engage the SIMMs in the connector. Simply place and push is not enough.

2021-05-21--01.jpg

Anyway, it was a success

2021-05-21--03.jpg

Now that my STE has more than 512Kb RAM, I can finally run Gembench. (And yaart tested successfully too)

2021-05-21--02.jpg

[sporniket]

The FDD controller and ports. The subsheet is quite full. I also took time to finally put a licence note on the page layout descriptor.

subsheet_302.sch

The git repository is up to date.

[sporniket]

The generation of SCLK and CLK2 was quick to do, and that's the end of the sheet #3. Next sheet deals with the GSTMCU, the shifter, and the video circuitry, it won't be so quick to capture...

subsheet_303.sch

The git repository is up to date.

[sporniket]

I have just finished the GSTMCU. It fits the A4 page !!

subsheet_400.sch

The github repository is up to date.

[sporniket]

The shifter

subsheet_401.sch

The git repo is up to date.

[sporniket]

Hum, how embarassing. It seems that recently, I have attached the kicad subsheets instead of the pdf tracing... :oops:

subsheet_302-U301 — WD1772 and port.pdf

subsheet_303-U303 — SCLK & CLK2 clocks.pdf

subsheet_400-U400 — GSTMCU.pdf

subsheet_401-U401 — GST Shifter.pdf

[sporniket]

Today I completed the Video Port. The github repository is up to date.

subsheet_402-J400 — Video Port.pdf