ST536 STE EDITION

All about the ST536 030 ST booster.
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exxos
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Re: ST536 STE EDITION

Post by exxos »

Steve wrote: 12 May 2025 20:58 Sorry @exxos it's taken me so long but finally tonight I managed to swap out the Xilinx. Gonna check it for shorts tomorrow and potentially program it.
:thumbup:
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Re: ST536 STE EDITION

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Killed my CF card :roll: think I plugged it in one pin to high :roll: PC wont even find it now :roll:

Madness price of some even used ones. Guess I could try some noname china brands and see if they work..
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Re: ST536 STE EDITION

Post by coonsgm »

I'm pulling my hair out here reflowing solder points checking for any pin issues. Everything seems good...checked for shorts, checked for non-connected pins going around the PLD about 3 times pin by pin.

I think I'm going to take a break and come back to it in a few days.
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Re: ST536 STE EDITION

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coonsgm wrote: 12 May 2025 22:56 I'm pulling my hair out here reflowing solder points checking for any pin issues. Everything seems good...checked for shorts, checked for non-connected pins going around the PLD about 3 times pin by pin.
You need to use YAARTTT as you should be able to find out if there is a bad bit or not.

If you have STOS it's easy to do tests there..

Code: Select all

loke ($2000000),12345678
print leek($2000000)
https://exxosforum.co.uk/atari/STOSFLOPPY/STOS1904.zip
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Re: ST536 STE EDITION

Post by exxos »

@coonsgm just thought, have you hot the 33pf cap on the CPU ?

viewtopic.php?p=128013&hilit=Bad+clock#p128013
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Re: ST536 STE EDITION

Post by coonsgm »

I'll try and take a look tonight!
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exxos
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Re: ST536 STE EDITION

Post by exxos »

Is this code doing what I think it's doing ?

Code: Select all

address <= shadow_enable ? shadow_row : { A[23:11] };
address = A[23:11] when shadow_enable = 0
address = shadow_row when shadow_enable =1

??

EDIT

AND:

Code: Select all

wire [12:0] shadow_address = {5'b00111, A[18:11]}; // Maps to 0x4F00000-0x4F7FFFF
??
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exxos
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Re: ST536 STE EDITION

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I don't get it :pullhair: :pullhair:

TOSCOPY.PRG is run, it copys TOS206 space to $4F00000 (copy verified in STOS)
Then the PRG accesses 4F80000, which triggers copy_done to go high (also verified)

In main top I had to patch the RAM decode with & (TOSCE | ~copy_done | AS30);
which should make ram_decode =0 on TOSCE =0, copy_done =1, AS30 = 0

Code: Select all

assign TOSCE =  ( A[29:20] != 10'hE & A[29:20] != 10'h3FE & A[29:3] != 27'h0 ) | ~RW30  | (AS30 & AS) ; 
wire ram_disable = 1'b0; // 1 = disable TTRAM
wire ram_area = ((A[29:28] != 2'b00) | (A[27:24] == 4'b0000)) & (TOSCE | ~copy_done | AS30);
assign ram_decode = ram_disable ? 1'b1 : ram_area;
ram_decode is 0 on match

As when copy_done is high, and TOSCE = 0 , we are accessing ROM (which is now in TTram)
ram_decode going low also sets the CPU to 50mhz.

then in SDRAM module.

Code: Select all

// Address translation: Redirect TOS206 addresses to 0x4F00000-0x4F7FFFF
wire shadow_enable = copy_done & ~AS30 & ~TOSCE; // Enable for TOS206 addresses
wire [29:0] A_INT = shadow_enable ? {7'b0011110, A_IN[22:0]} : A_IN; // Translate to 0x4F00000
Basically "done"...

BUT it locks up when copy_done goes high, so I assume the address translation isn't working, or the CPU isn't in 50mhz mode during the shadow rom access. Or the idea simply doesn't work, or i've done something dumb.

I have the 16bit ROM disabled when copy_done = 1. The 536 databuffer is turned off. I even ignore STE ROM DTACK. I even stop the STE from seeing ROM access.. I even stop my own ROM DTACK from going going low (as it would likely conflict with the SDRAM logic STERM otherwise).

:shrug: :pullhair: :pullhair: :stars: :stars: :headbang:
:dizzy:
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Re: ST536 STE EDITION

Post by PhilC »

@exxos I should have a bit of spare time over the next few days now I've got the Raven working.

Re the rom copy, can you not do this with the xilinx?
If it ain't broke, test it to Destruction.
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Re: ST536 STE EDITION

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PhilC wrote: 13 May 2025 17:32 Re the rom copy, can you not do this with the xilinx?
Copying that address range would require a megaload of counters ... It's best to let the CPU do it. But the copying works fine anyway.. it's when it switches from ROM to TTram it locks up.

I am out of ideas...I'll probably have to resort to adding a small SRAM and just bank switch the thing.

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