SidecarTridge TOS Emulator + Booster

[logronoide]

Hi all,

As we move into 2025, I plan to make my gadgets booster- and accelerator-friendly. I’ve started with the TOS Emulator—because, well, why not?

The good news: it works perfectly out of the box at 8MHz and almost works at 16MHz. Unfortunately, it doesn’t work at 32MHz, but there will be more later. (By the way, the Booster works flawlessly with Exxos’ Fast TOS, though I occasionally see some random memory issues, which I suspect are my fault.)

Wiring Configurations:
8MHz (OK):
- SW wire to GND
- 32MHz wire open
- CE wire open

8MHz (OK):
- SW wire to GND
- 32MHz wire connected to U405 pin 4
- CE wire open

16MHz (OK):
- SW wire open
- 32MHz wire connected to U405 pin 4
- CE wire open
- (Odd crash occurs when enabling the Blitter.)

32MHz (KO):
- SW wire open
- 32MHz wire connected to U405 pin 4
- CE wire connected to CE of the TOS Emulator custom board (ROM Emulator)

Current Observations:
I’ve optimized the firmware to handle speeds below 40ns, but with no success. I suspect the issue might be the additional latency from the level shifters. However, with nothing active on the bus, I’m scratching my head trying to confirm this.

I’m also wondering if connecting both CE signals—one from the Booster and one from the Atari motherboard—could be causing interference. I hooked up a logic analyzer but couldn’t draw any conclusions: I see a single CE low at startup, but nothing happens—not even garbage data.

What I Know So Far:
I’ve reviewed the Booster development logbook, and using OE instead of CE should not pose any issues—the design and firmware support it.

My next steps would involve:
1. Breaking out the oscilloscope: Yeah, I know... I should start there...
2. Testing a more powerful RP235x microcontroller: The RP235x is twice faster than RP2040 but it has an ugly bug that impacts my designs.
3. Trying faster level shifters (74ACHT245 instead of the slower 74HCT245): I use the ACHT versions in the Multi-device, which is (was?) overkill, but due to size constraints I move to the more generally available HCT versions.

Before diving in, I want to confirm if I might be missing something obvious or doing something wrong. Any insights or suggestions would be greatly appreciated.

Some info about my stuff:
https://docs.sidecartridge.com/sidecartridge-tos/
https://docs.sidecartridge.com/sidecartridge-rom/

Merry Christmas to all!
Diego

One more thing!: I wanted to implement a digital switch (8Mhz/32Mhz) connecting the SW signal to one of the available microcontroller GPIOs.But first things first.

[coonsgm]

I can also confirm it works with my STE536 68030 STE.

[logronoide]

I can also confirm it works with my STE536 68030 STE.

Awesome! Can you give more details? What Mhz speed runs the bus of the STE536?

If I am not wrong the Booster divides the clock and system period by 2 (16Mhz) and 4 (32Mhz), so the ROM and RAM must support these speeds. Sadly I think the current design does not support speeds below 45-50ns which is what 32Mhz mode seems to support. But eventually I will find the way to speed up the access.

[coonsgm]

The booster itself runs at 50mhz which affects the CPU and fastram.

The ST RAM should still be running at the same speed as usual 8mhz. I’m not the expert on that though. My comment is that it runs.

[exxos]

The STE536 may run the ROM faster than stock, but not sure the effective speed as I think I "limited" the speed up to use 100ns ROMs on the ST536. But the firmware has changed a lot from the ST536. I probably manage the ROM speed out of it would need a 55ns ROM.

The V1 STE booster is extremely timing critical. The 55ns ROM is essentially overclocked as it is.

You should aim for 55ns total access speed.. Of course this has to include the PLD delays. IIRC the STE has 20ns delay for the ROM logic decoding.. so you have that even before CE/OE is triggered, where you have a 55ns ROM, + 75ns cycle speed. I did write all these calculations down during development somewhere. But I had great difficulty in getting a 55ns ROM running at a 32MHz CPU speed.

Also slightly confused about your CE comments..

CE is driven by the STE combo chip. The CE to booster connection just means that when the STE decodes a ROM address, and sets CE low on the ROM, that wire to the booster tells the booster to switch into 32MHz. If you did not connect that wire then you would not get 32MHz ROM access. It would run at the stock 8MHz speeds.