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DFB1 based-design clone

Discussion and support for the DSTB1 & DFB1 boosters by BadWolf..
TotO
Posts: 36
Joined: 04 Mar 2021 17:27

DFB1 based-design clone

Post by TotO »

Hello,

Since a week, I'm working on my own 68030 / 32MHz / 16MB TT-RAM expansion based on the amazing DFB1 project.
The idea is to have into my Falcon 030 a little expansion close to what the Falcon was able to be, 30 years ago.
I would like to thanks again D Henderson for his great project that allows to save a lot of time and test (CPLD).

This topic, because I may have some questions around the original DFB1 project related to my work in progess.
- Why the CPU decoupling capacitors have different values than 100nF on the schematic?
- Why the CPU jumpers to disable the MMU and CPU Cache are closed and linked to VCC?
It looks to be forced to enable, while I have expected to find them open and "linked" to GND.

Thank you! :D

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Falcon 030 MK-II.png
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exxos
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Re: DFB1 based-design clone

Post by exxos »

I will try and answer your questions, but @Badwolf Has not been around much lately because of his newborn baby.
TotO wrote: 20 Apr 2023 19:30 - Why the CPU decoupling capacitors have different values than 100nF ?
They don't have to be 100nf. Higher values always preferable. Problems only generally arise when the packages start getting incredibly large. For example you can easily get 100nF or 10uF in a single 0805 type package these days, so why not use them ?
TotO wrote: 20 Apr 2023 19:30 - Why the CPU jumpers to disable the MMU and CPU Cache are closed and linked to VCC?
It looks to be forced to enable, while I have expected to find them open and "linked" to GND.
You would have to check the 68030 datasheet on the cache/MMU enable/disable pins. That is just how they are.
TotO
Posts: 36
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Re: DFB1 based-design clone

Post by TotO »

Thank you for your fast answer.

Here the different values on the DFB1 schematic for the 68030:

dfb1 cpu capacitors.png

I don't know if it is a schematic copy/paste mistake or if they have to be like that for the different VCC pins.

About !CDIS and !MMUDIS, may be I have not properly understood what said the 68030 manual:

cdis mmudis.png

If you confirm it is OK, it is perfect. Thank you! :)
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exxos
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Re: DFB1 based-design clone

Post by exxos »

TotO wrote: 20 Apr 2023 20:16 I don't know if it is a schematic copy/paste mistake or if they have to be like that for the different VCC pins.
Where is C16 on the PCB, what's it actually connected to ? Can't say why it is there. Best to wait for @Badwolf to explain that one.
TotO wrote: 20 Apr 2023 20:16 About !CDIS and !MMUDIS, may be I have not properly understood what said the 68030 manual:
cdis mmudis.png

If you confirm it is OK, it is perfect. Thank you! :)
Connecting to GND diables the MMU or CACHE. Doesn't seem to state open or vcc connection. Maybe the CPU has internal pullup to VCC ? But connecting to VCC likely just enables the MMU or CACHE the same as "open" would do. Its probably explained *somewhere* in the datasheet.
TotO
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Joined: 04 Mar 2021 17:27

Re: DFB1 based-design clone

Post by TotO »

It looks C16 is used as decoupling capacitor for IC5 (SN74CB3T3245PW).
I think the schematic was updated from the PCB and something goes strange.

About CDIS and MMUDIIS, I though they are using internal pull-up, but I don't find that information.
On the Falcon schematic, the pins are listed as EM0, EM1 and are tied to VCC through a 10K resistor.
TotO
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Re: DFB1 based-design clone

Post by TotO »

I have found that into the NXP 68030 datasheet!

MC68030 pullup.png
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Re: DFB1 based-design clone

Post by exxos »

:bravo:
TotO
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Re: DFB1 based-design clone

Post by TotO »

I have restored the JP as done on the original schematic. Anyway, I do not expect to physicaly disable the MMU and CPU cache.
I have moved the two optional settings as open jumper on the back of the PCB. I do not expect to do more than disable the flash ROM.
I have arranged and reduced a bit the layout to match with the electronic parts I own or I can buy, like the DIP8 oscillator footprint.

Now, I have to take a look into the FPGA to see if the address decoding is done as expected. (I'm not using A25-A31)

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Falcon 030 MK-II-3D.png
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Rustynutt
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Re: DFB1 based-design clone

Post by Rustynutt »

Fascinating :mrgreen:

I'm happy to see someone take off with Dave's design, commendable work on his part. Really opens up a new era for expansion port devices.

My interest so far has been looking at his design from possible 68040 viewpoint.
Losing the 882 leaves a nice foot print for a DSP upgrade. Heck, there's even a white paper "A Cryptographic Library for the Motorola DSP56000" :lol:

Reading the 040's WIKI, came across this tidbit of it's usage on aircraft.
Screenshot_20230422-084529~2.png
Interesting :)
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TotO
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Re: DFB1 based-design clone

Post by TotO »

He his fantastic and have a great Youtube channel too. :)

I have dropped the FPU, but I have wired "XDS" (DS through a 180 Ohn resistor to the unconnected pin 13).
So, a little optional strap at the back on the mainboard should allow to use the internal FPU socket instead.

About the 68040, I can imagine it require more works around the FPGA and will be no more a Falcon 030. :D
I have always though the Falcon 040 mainboard was expected to use a full 32-bit DSP 96001 and not the 56001.

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