Atari STE with T0 and e7 spurious interrupt

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32bitminus
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Atari STE with T0 and e7 spurious interrupt

Post by 32bitminus »

I am having a bit of trouble trying to trouble shoot an UK 1040 STE. When turning it on I get bombs across the whole screen.

The machine originally had the video shifter, the CPU, and the TOS ROMs socketed. I have cleaned all the sockets with deoxit, reseated, etc. I have also swapped out the TOS rom and CPU with known good ones. Also swapped RAM around, installed a pair of 2 in the correct alternate sockets, tried different ram, etc.

I was able to run the STE diag cart, and I get the following:

E7 Spurious Interrupt
T0 MFP Timer

More often than not it is just the E7 error repeated infinitely, so the processor is working :)

Going over the machine very carefully with a magnifying glass I see:
  • The LMC1992 chip has redo work done and poor soldering/flux residue (Via on ground plane messed up but salvageable).
    The WDC1772 chip has redo work done and poor soldering/flux residue. (Via on ground plane messed up but salvageable)
    The MIDI ports are all scratched up, so I assume it was used for MIDI work (Spin marks on the socket, someone trying to get the cables aligned.)
    Reset Switch may or may not have been replaced.
Clearly this machine either had problems that were fixed, or attempted repair and they gave up.

I noticed all the caps are still factory wang, but have sharpie dots, as do many of the ICs but with check marks. Not sure if this was factory or someone trying to repair the machine and marking as they go.

I also noticed the original PSU had the fuse missing and someone bridged it with bare wire.... Makes me wonder if a surge ran through this system.

I have desoldered both the the WDC and the LMC chips, tested all the VIAs, and placed new sockets in. I was able to check with a good WDC chip, no change. I do not have the LMC DMA/Sound MIxer chip to swap with another.

I also pulled and tested the 4700uf large cap, tested good, so I re-installed.

I am thinking it is the MFP Chip that may be defective, but before I replace that, any other suggestions?

I notice that with just the test cart the E7 message will run forever, the CPU gets warm. The only chip that is ice cold is the gst/mcu the Atari Custom SMD chip on the board, I can't remember the exact name.

signal-2022-12-07-201330.jpeg
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exxos
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Re: Atari STE with T0 and e7 spurious interrupt

Post by exxos »

Check the IPL lines on the CPU to see if any stuck low.

All should have a pull up to 5v.

They go back to the GST MCU.. So check connections etc
32bitminus
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Re: Atari STE with T0 and e7 spurious interrupt

Post by 32bitminus »

Thanks will check, I did neglect to mention I checked the ipl lines and had continuity. My luck it will be that component:). Guess I will need to learn smd rework skills but not on this board.
32bitminus
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Re: Atari STE with T0 and e7 spurious interrupt

Post by 32bitminus »

Interesting.

So assuming I have the right pinouts (Logic probe powered off the 4700uf cap and the shield around the cart port):
25 IPL2 LOW
26 IPL1 LOW
27 IPL0 HIGH

Lines all tone out to the GST MCU...

Does this mean mean a surface mount chip replacement is in my future?

The block diagram below sounds like the MFP may make the interrupt call to the GLU but never passes the vector info for the interrupt and the GLU passes it through only the interrupt request? Is it still possible the MFP is defective and not the GST MCU?

During some research last week, I read somewhere that T0 was failure of one of the MFP timers, and I seem to recall the crystal goes to two of the clock inputs on the MFP, probably a red herring and I don't know what I am talking about so there is that, just spit balling ideas.

Looks like pin 32 from the MFP is the IRQ Output to the GST MCU, will see if that line looks good.

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Re: Atari STE with T0 and e7 spurious interrupt

Post by exxos »

Have you checked they have pull-up resistance such as 10K to 5V ? Checked they are not shorted to GND ?

Indeed I am not overly sure about the interrupt lines but I don't think 2 should be low at once like that. But could suggest the GST may be buggered at this point.
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Re: Atari STE with T0 and e7 spurious interrupt

Post by exxos »

32bitminus wrote: 09 Dec 2022 21:24 The block diagram below sounds like the MFP may make the interrupt call to the GLU but never passes the vector info for the interrupt and the GLU passes it through only the interrupt request? Is it still possible the MFP is defective and not the GST MCU?
I guess you could change the MFP. But if you just un-solder it (or just cut the data pins off) and see if those IPL lines go high, then it would rule out the GST I guess.
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Re: Atari STE with T0 and e7 spurious interrupt

Post by 32bitminus »

exxos wrote: 09 Dec 2022 21:31 Have you checked they have pull-up resistance such as 10K to 5V ? Checked they are not shorted to GND ?

Indeed I am not overly sure about the interrupt lines but I don't think 2 should be low at once like that. But could suggest the GST may be buggered at this point.
I did just check pin 32 on the MFP and it is active low, which is what it should be (IRQ Output) I assume if making a request to the GST. So seems stuck making a request? There are no components between the MFP and the pin on the GST, just a few VIAs, and it measure .5 ohms without power pin to pin.

A long time ago I learned about PC interrupts and the 2 interrupt controllers being cascaded, since they each had 8 IRQs they could handle. How those worked with one interrupt on the higher priority chip being called from the lower chip when one of its 0-7 interrupts was utilized. The chip that by its nature calling the master interrupt controller all its requests were in general lower on the list ;)

This seems similar, in the sense that the serial and other lower devices go through this chip, but doesn't mean my old knowledge translates either.

How do I check the 10k to 5V pull-up resistance? I appreciate the patience, trying to learn more but be detailed here for others to learn too :) I assume with power off, just check the pins to ground and see what the ohms are?

Since the MFP is way easier to replace than the GST, don't mind throwing the dollars (or pounds!) to have the learning experience here and replace that if it has somehow failed internally and generating bad interrupts.

MFP.png
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32bitminus
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Re: Atari STE with T0 and e7 spurious interrupt

Post by 32bitminus »

Pin 93 is from the MFP to request the interrupt, I see there is an ack pin too...

Worth checking :)

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Re: Atari STE with T0 and e7 spurious interrupt

Post by exxos »

32bitminus wrote: 09 Dec 2022 21:53 I did just check pin 32 on the MFP and it is active low, which is what it should be (IRQ Output) I assume if making a request to the GST. So seems stuck making a request? There are no components between the MFP and the pin on the GST, just a few VIAs, and it measure .5 ohms without power pin to pin.
Pin 32 will always be low because ( I assume) you are using a mono monitor ? But also the GST has to request the data from the MFP so the GST IPLx pins should not be low all the time.

Pin 52 is the MPF_CS line which is driven by the GST.. That should not be low all the time.. *unless* it never gets DTACK from the MFP. If both are low then the GST is stuck on that access for some reason. In which case, BERR will be triggered on the CPU.

32bitminus wrote: 09 Dec 2022 21:53 How do I check the 10k to 5V pull-up resistance? I appreciate the patience, trying to learn more but be detailed here for others to learn too :) I assume with power off, just check the pins to ground and see what the ohms are?
With power off.. Just measure resistance from the pins to 5V.. Should be 4.7K or 10K or at least something around that value.
32bitminus wrote: 09 Dec 2022 21:53 Since the MFP is way easier to replace than the GST, don't mind throwing the dollars (or pounds!) to have the learning experience here and replace that if it has somehow failed internally and generating bad interrupts.
I would check but I said earlier about pins 52(CS) and 50(DTACK)

Operation would be something like the size and. But really would have to check it on a working machine.

MFP sets CS low.
MFP sets DTACK low.
IPLx goes low
MFP sets CS high.
MFP DTACK goes high.

I don't know how long IPL stayed low for but indeed if you are seeing it low all the time on a logic probe then that indeed is not correct. I would check BERR on the CPU as well.

Alternatively just lift up pin 52 on the MFP and tie it to 5V.. IPLx should all go high.. if they don't then likely the GST is busted. But still the MPF cannot be ruled out totally without unsoldering it.
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Re: Atari STE with T0 and e7 spurious interrupt

Post by exxos »

32bitminus wrote: 09 Dec 2022 22:09 Pin 93 is from the MFP to request the interrupt, I see there is an ack pin too...

Worth checking :)
gst-mcu.jpeg
Indeed.

The simplest thing I think it is to remove the MFP and see if the IPL lines go high ( after checking they have the pullups of 10K on them). If they do go high then it would appear the GST may not to blame. As it would let IPLx go high. If they are still stuck alone then likely the GST is busted.

Though I unfortunately are not very familiar with the internals of the MFP so cannot really advise any further.

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