MMU operation and ST Startup & running where does code live?
MMU operation and ST Startup & running where does code live?
The ST would appear to have 2 places it can execute code from: a) in ROM & b) in RAM.
It is clear that the first few cold start instructions must execute from ROM and any code on disk must be loaded into RAM for execution.
After initial startup what happens to the ROM is the code copied into faster RAM for normal execution or is it executed directly from the slower ROM?
Where do I find documentation on kernel mode execution and MMU functions?
Does the MMU remap any physical block(s) into anywhere in the CPUs address space?
How do I set mapping and set protection on regions of memory?
Thanks
Peter
It is clear that the first few cold start instructions must execute from ROM and any code on disk must be loaded into RAM for execution.
After initial startup what happens to the ROM is the code copied into faster RAM for normal execution or is it executed directly from the slower ROM?
Where do I find documentation on kernel mode execution and MMU functions?
Does the MMU remap any physical block(s) into anywhere in the CPUs address space?
How do I set mapping and set protection on regions of memory?
Thanks
Peter
Re: MMU operation and ST Startup & running where does code live?
given that only TT and Falcon have a processor with builtin MMU, I guess you are looking for TOS v3 and more, not ST.
Re: MMU operation and ST Startup & running where does code live?
EDIT: This image flow may help with how the ST starts up
Re: MMU operation and ST Startup & running where does code live?
ROM is not copied to RAM unless a program specifically copies ROM to alt-ram for faster execution for example. Code still executes from ROM otherwise.
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Re: MMU operation and ST Startup & running where does code live?
Normal operation is for OS code to be executed from the ROM. Unless of course a cartridge (Such as a diag cart) is detected, in which case the ROMs on the cart will run instead. Still from the ROM though and not RAM IIRC.
The only exceptions I'm aware of are the original STs that came with OS on floppy disk or if I understand it correctly (And I may have this wrong) when you use a patcher to load an alternate version of TOS from floppy.
Since you are probably not doing either of the above then take it as running from ROM.
The only exceptions I'm aware of are the original STs that came with OS on floppy disk or if I understand it correctly (And I may have this wrong) when you use a patcher to load an alternate version of TOS from floppy.
Since you are probably not doing either of the above then take it as running from ROM.
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800XL and 65XE both with Ultimate1MB,VBXL/XE & PokeyMax, SIDE3, SDrive Max, 2x 1010 cassette, 2x 1050 one with Happy mod, 3x 2600 Jr, 7800 and Lynx II
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800XL and 65XE both with Ultimate1MB,VBXL/XE & PokeyMax, SIDE3, SDrive Max, 2x 1010 cassette, 2x 1050 one with Happy mod, 3x 2600 Jr, 7800 and Lynx II
Approx 20 STs, including a 520 STM, 520 STFMs, 3x Mega ST, MSTE & 2x 32 Mhz boosted STEs
Plus the rest, totalling around 50 machines including a QL, 3x BBC Model B, Electron, Spectrums, ZX81 etc...
Re: MMU operation and ST Startup & running where does code live?
"You are not authorised to read this forum."
Re: MMU operation and ST Startup & running where does code live?
@DoG - My bad, edited my original post.
Re: MMU operation and ST Startup & running where does code live?
Is running code from ROM actually any slower than RAM on a stock ST?
Re: MMU operation and ST Startup & running where does code live?
I don't believe so, no.Smonson wrote: Wed Feb 16, 2022 2:16 am Is running code from ROM actually any slower than RAM on a stock ST?
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DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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Re: MMU operation and ST Startup & running where does code live?
Question about ROM have already been answered above i think. Regarding MMU: as normally only TT and Falcon can have one, TOS 1.x and 2.x don't do anything with it. Even in TOS 3.x and above, only the TTR registers are setup to map the $FF0000 range to $FFFF0000 so you can access I/O at both addresses. Only a minimal MMU translation table is setup. There are however some programs that make use of it: MiNT (when using Memory-Protection), MAPROM (copies ROM to RAM, and optionally protects it to be readonly), and several Virtual Memory Managers like Outside and Vram.microman wrote: Fri Feb 11, 2022 2:21 pm Does the MMU remap any physical block(s) into anywhere in the CPUs address space?
How do I set mapping and set protection on regions of memory?
Explaining how to set up the mapping is beyond the scope here
