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Phoenix Shifter programming details

Progress on our FPGA cores.
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mrbombermillzy
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Phoenix Shifter programming details

Post by mrbombermillzy »

For anyone wanting to help with the phoenix shifter software testing thats not 'in the loop' with regards to all the HW details, or where the ST remake project is currently at, it might be an idea to collate all the tech details, either here, or in a relevant thread.(Apologies if theres a topic thread with this information already; I coulnt find the info).

Hopefully, someone (or two) will know the answers to the following, which would be a start:

> CPU(s) used in the project?
> CPU(s) speed? (Also, if 030> any 'burst' access and to any fast (i.e. only acessible by CPU) RAM possible?)
> System bus Speed?
> Any unusual wait states/bus arb. for the above? (i.e. any extra cycles added to any access for any reason thats notably different from the standard STs?/ DMA cycle allocations, etc.)
> Shifter operational data RW width/ shift buffer size?
> Is the Phoenix shifter Video Address Pointer or Video Count Position Register switchable with different granularity from the regular ST/TT? (i.e. VBL/HBL/pixel perfect precision).

If anyone can think of any other relevant questions that I have missed, from a software facing perspective, please chip in. :)
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exxos
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Re: Phoenix Shifter programming details

Post by exxos »

Phoenix Zone was created to correlate all relevant information into more digestible chunks. But myself and @Icky Have not yet had much time to do such things.

However, I do plan to start transferring all relevant information over to the new Wiki "soon" starting with the various revisions of the remake boards and fixes etc. of course time is always against as.

Of course if people really are confused what is going on with anything then shout out in this thread and we can address it..
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Re: Phoenix Shifter programming details

Post by exxos »

mrbombermillzy wrote: 04 Jan 2022 15:48 > CPU(s) used in the project?
MC68000 PLCC68 (Can also use the 64 DIP).

mrbombermillzy wrote: 04 Jan 2022 15:48 > CPU(s) speed? (Also, if 030> any 'burst' access and to any fast (i.e. only accessible by CPU) RAM possible?)
The Phoenix platform is a solid foundation for a properly working "STF". So as such there is no 030 CPU unless you add something like a TF536 onto it. But that is not officially part of the Phoenix platform anyway.
mrbombermillzy wrote: 04 Jan 2022 15:48 > System bus Speed?
> Any unusual wait states/bus arb. for the above? (i.e. any extra cycles added to any access for any reason thats notably different from the standard STs?/ DMA cycle allocations, etc.)
> Shifter operational data RW width/ shift buffer size?
> Is the Phoenix shifter Video Address Pointer or Video Count Position Register switchable with different granularity from the regular ST/TT? (i.e. VBL/HBL/pixel perfect precision).
I think overall these questions are jumping the gun a little bit. The Phoenix platform is a "fixed" STF design overall. We had to create a working foundation in order to build and test upgrades without fighting a buggy machine otherwise.

As for the shifter,MMU,GLUE, BLITTER, the shifter is being rebuilt to offer HDMI outputs. Chip shortages have put a stop to that project for a while now. Myself and @Icky I also working on a new MMU & GLUE core based on the STE Suska FPGA cores. But again chip shortages and lack of time have stalled those projects.

The idea is that once those projects are completed, we do not need accelerators as the system bus speed can be something like 32MHz instead of the usual 8Mhz. Only when we have fast access to ST-RAM can we look into higher resolutions and great colour depths with the Phoenix shifter.

It is all very much WIP and it is fundamentally a lot of work just myself and @Icky to complete. So it will be some years before was a system would be born. But this also depends on interest in the projects. Currently there are multiple H5 boards un-sold in my store. The price has undoubtedly put a lot of people off, but unfortunately as things progress, the price is fundamentally going to increase each re-spin of the board.
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Re: Phoenix Shifter programming details

Post by mrbombermillzy »

exxos wrote: 04 Jan 2022 16:05
I think overall these questions are jumping the gun a little bit. The Phoenix platform is a "fixed" STF design overall. We had to create a working foundation in order to build and test upgrades without fighting a buggy machine otherwise.
Ok. I get the jist of it. Just trying to re-engineer the standard STF..

However, I thought there may have been some other tweaks, due to the shifter having a 8bpp option and using a workaround for this, hence asking if there were any other 'non standard' features.
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Re: Phoenix Shifter programming details

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mrbombermillzy wrote: 04 Jan 2022 16:16 However, I thought there may have been some other tweaks, due to the shifter having a 8bpp option and using a workaround for this, hence asking if there were any other 'non standard' features.
There may be other stuff in there. But @Icky was mostly working on the core. But I'm not sure what other features there could possibly be without the extra RAM bandwidth anyway ?

I guess ultimately it could provide extra resolutions and colour depths at the expense of frame rate. I think this is pretty much what the external graphics cards end up doing anyway ?. But I'm not really sure what use that would be past displaying still images ?
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Re: Phoenix Shifter programming details

Post by sporniket »

exxos wrote: 04 Jan 2022 16:05 Currently there are multiple H5 boards un-sold in my store. The price has undoubtedly put a lot of people off, but unfortunately as things progress, the price is fundamentally going to increase each re-spin of the board.
I guess that all the remaining board are waiting for new people that get into the hobby for the tinkering side.

When I was pondering whether getting a mister fpga or real hardware to tinker with, I stumbled by chance upon the H5 and the price difference heavily tilted the choice toward your motherboard, and I was not afraid with the work involved. Plus I liked the intent of "getting things right/better".

Personnally I have yet to finish my H5 rev B1, and it will not happen before long, because I want to address the goal of using USB-PD to supply the power first.
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Re: Phoenix Shifter programming details

Post by mrbombermillzy »

@exxos Perhaps if I backtrace a bit with who said what...

We were discussing the 32000 colour twin shifter mod: https://www.exxosforum.co.uk/forum/viewt ... 325#p76325

Icky suggested it could be recreated with the Phoenix shifter. Smonson elaborated that the shifter already had a 'ST compatible' 8bpp mode, so I offered to perhaps port some of my TT shifter testing routines over, if it would help to pick up any differences or errors of standard operation/emulation.

However, only having a Mega 4, (or worse, the TT shifter) my actual code may possibly skew the intended result as its somewhat not quite an STF shifter with STF 8Mhz clock compatible (fine for 'light' use I suppose, but that defeats the point).

Long term though, I am slowly working on some (like you guessed) still image display code (and maybe more if it all works out), so if I knew the full details, I could maybe work on the phoenix version in parallel, so there's something ready for it when it finally goes into production.

No sweat though. I was just eyeing up the details I do know to see what can be done.

I can wait for when you guys are ready with the nitty gritty stuff. :)
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Re: Phoenix Shifter programming details

Post by mrbombermillzy »

sporniket wrote: 04 Jan 2022 17:42
exxos wrote: 04 Jan 2022 16:05 Currently there are multiple H5 boards un-sold in my store. The price has undoubtedly put a lot of people off, but unfortunately as things progress, the price is fundamentally going to increase each re-spin of the board.
I guess that all the remaining board are waiting for new people that get into the hobby for the tinkering side.

When I was pondering whether getting a mister fpga or real hardware to tinker with, I stumbled by chance upon the H5 and the price difference heavily tilted the choice toward your motherboard, and I was not afraid with the work involved. Plus I liked the intent of "getting things right/better".

Personnally I have yet to finish my H5 rev B1, and it will not happen before long, because I want to address the goal of using USB-PD to supply the power first.
I would like to help, but unlike you guys, I cannot solder/build boards, so offered with the software test side (If I can even do that! :( ) Hence not really keeping up with the remake... out of my scope, ability wise, to build. Only stumbled into its path due to the twin shifter mod really.
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Re: Phoenix Shifter programming details

Post by Icky »

I have moved this topic into the FPGA Development area where we are discussing the Phoenix Shifter. Once we have got a complete working Phoenix Shifter as it is about 98% there, then we can look at what can be done from that base.

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