Programming TF536 - Segger

[Aeberbach]

All this time I assumed that JTAG is JTAG and I would be able to just use my Segger J-Link to program this thing. But ISE seems to be the only thing that can read a jed file and it doesn't want to talk to my Segger. Looks like I might have to buy one of the uspported hardware links?

Am I wrong? Anyone using a Segger J-Link to program this Xilinx CPLD? :(

[Aeberbach]

(I worked out the Raspberry Pi method but would still like to know about the Segger J-Link)

[amimjf]

Hi

JTAG is an industry standard but the Segger programmers only have knowledge of how to write to various NOR/NAND flashes, both on-chip and external ones via SPI/QSPI. They can also access hardware debug unit direct on the CPU to set breakpoints and read/write memory.

I don't think I've every seen CPLD/FPGA programing functionality on the Segger units and I've been using them for about 10 years at work.

[czietz]

Usually, JTAG programming/debugging hardware can replay a SVF (serial vector format) file, which is just a list of JTAG commands and expected responses. You can use Xilinx Impact to create said SVF file for the firmware.