https://fossi-foundation.org/2020/06/30/skywater-pdkDid you ever dream about creating your own chip? I mean, a physical chip. One which you can hold in your hand, and which does exactly what you’ve designed it to do?
Until today, there were two major road blocks: you had to get access to a process design kit (PDK) from a chip manufacturing house (a foundry), and you had to have enough money to actually pay for the manufacturing. These times are over. Today.
Today, in a FOSSi Dial-Up talk, Tim Ansell of Google announced SkyWater PDK, the first manufacturable, open source process design kit. What differentiates this PDK from previous attempts is the fact that it is manufacturable: with this PDK, you can actually produce chips with the SkyWater foundry in the 130nm node.
That leaves you as chip designer only with one road block: money. Manufacturing chips is expensive – even for more than a decade old nodes like the 130nm node, you need to spend at least a couple thousand dollars.
You know what? Don’t worry – Google and efabless have got you covered! They are providing completely free of cost chip manufacturing runs: one in November this year, and multiple more in 2021. All open source chip designs qualify, no further strings attached!
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Google SkyWater IC-manufacturing project
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Smonson
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Google SkyWater IC-manufacturing project
Anyone else see this?
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alexh
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Re: Google SkyWater IC-manufacturing project
Interesting. Apollo team should definitely get in there if this is true.
Senior Principal ASIC Engineer - SystemVerilog, VHDL
Thalion Webshrine - http://thalion.atari.org
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Thalion Webshrine - http://thalion.atari.org
ST,STf,STfm,STe,MegaST,MegaSTe,Falcon060
A500+,A600,A4000/060,CD32,CDTV
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troed
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Re: Google SkyWater IC-manufacturing project
Whoa
Making new runs of custom chips would be awesome. This increases the use we would have from decapping and recreating them.
(I'd much rather have copies of the originals than sw versions in an FPGA. Same pinout, swappability etc)
/Troed
Making new runs of custom chips would be awesome. This increases the use we would have from decapping and recreating them.
(I'd much rather have copies of the originals than sw versions in an FPGA. Same pinout, swappability etc)
/Troed
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troed
- Posts: 936
- Joined: 21 Aug 2017 22:27
Re: Google SkyWater IC-manufacturing project
130nm is Pentium 4 class technology, so way way way more than needed. Also means we'd have high likelyhood of those recreations to be clocked much higher than the originals.
68060 was made with ~600nm.
68060 was made with ~600nm.
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alexh
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Re: Google SkyWater IC-manufacturing project
The catch is the design must be open source. But that doesn't stop a TG68k variant. Get started!
Senior Principal ASIC Engineer - SystemVerilog, VHDL
Thalion Webshrine - http://thalion.atari.org
ST,STf,STfm,STe,MegaST,MegaSTe,Falcon060
A500+,A600,A4000/060,CD32,CDTV
Thalion Webshrine - http://thalion.atari.org
ST,STf,STfm,STe,MegaST,MegaSTe,Falcon060
A500+,A600,A4000/060,CD32,CDTV
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Smonson
- Posts: 717
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- Location: Canberra, Australia
Re: Google SkyWater IC-manufacturing project
Gimmie that 3.3v MMU plz, thx!
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neilo40
- Posts: 36
- Joined: 08 May 2020 10:47
Re: Google SkyWater IC-manufacturing project
I had a play around with this. I used to get paid to do chip design and 0.13 was the last node I worked on so I was super excited to see it
It definitely looks interesting but very early doors. There’s still lots of IP needed but most of it appears to be in flight
The only issue for anyone hoping for 68k chips is that the foreseeable shuttles will be limited to 10mm^2 and more importantly ~40 I/O
It definitely looks interesting but very early doors. There’s still lots of IP needed but most of it appears to be in flight
The only issue for anyone hoping for 68k chips is that the foreseeable shuttles will be limited to 10mm^2 and more importantly ~40 I/O
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neilo40
- Posts: 36
- Joined: 08 May 2020 10:47
Re: Google SkyWater IC-manufacturing project
And actually the thing that got me most excited was 5v tolerant I/O :D
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