Current 16MHz & FPGA plotting (NEW JUMPERS LIST)

[exxos]

I have removed the 74F04 buffer chip and have started breaking up the clock lines with the intention of creating a new 16MHz mod board which will plug into the H2.

Basically there will be a row of jumpers which will basically replace all the jumper wire problems as we have with 16MHz on the Alpha.. So the stock machine can be set with one combination of jumpers, and then the jumpers can be removed, and it doubles up as a expansion header where the 16 MHz mod board plugs into.

As mentioned in the other thread a little ... https://www.exxosforum.co.uk/forum/viewt ... =50#p24031 I was in two minds if to start doing this or not.. As all these jumpers basically makes things a lot more complicated... And as said as well, integrating the 16MHz board would actually be a bit of a disaster for when the FPGA stuff comes into play, As it will basically be in the way and have to be removed..

But the point is, the FPGA board will be generating the clocks, so it has to plug into some connector somewhere on the motherboard anyway... So basically the jumper links will double up as the 16MHz & FPGA "clock generator connector". Then theoretically we should be pretty future proof when we start accelerating things more.

jmp.jpg

The image above is not complete with all jumpers yet, it is still WIP...

[exxos]

Right, so...

JP6 - Breaks 16MHZ from MMU to SHIFTER (so MMU can get 32MHZ externally)
JP7 - Breaks the DE signal from GLUE to MMU ( Video sync fix)
JP3 - Breaks 8MHz MMU output from system 8MHz ( as when MMU runs at 32mhz we need to down clock the now 16MHz back to 8MHz )
JP8 - Breaks 8MHz MMU output to CPU (so we can buffer it and add sync fixes and pipe in 16MHz etc)
JP9 - Breaks 8MHz MMU output to BLITTER (So we can feed in 16MHz)
JP10 - Outputs 32MHz from the MB OSC to feed the 16MHz mod board or whatever. Also outputs 2MHz for the DE sync fix.
JP11 - Breaks 8MHz MMU output to the expansion sockets ( so we can select them running at 8 MHz or 16MHz etc)
JP13 - Breaks the 4MHz MMU output (becomes 16MHz when MMU is double clocked) to the MFP clock ( gets down clocked to 4MHz again) ***

*** oddly I am actually run the MFP at 16MHz and seemed fine, but I have not done any testing relating to this specifically.

All those jumpers basically jumpered with the exception to JP10, to run the motherboard as a stock system. with all jumpers removed, this basically becomes a header to plug in external clock boards, such as the yet to be designed new 16MHz mod board ( currently being prototyped on the Alpha) with the later option of the FPGA board also plugging into that connected to generate the clocks at a later date..

So have I forgot to jumper any lines anywhere?

jp.jpg

[troed]

(Late to the party)

The original doubleST mod runs the Shifter at 64MHz. With a replacement Shifter (Smonson's design or other) it only needs 32. Also, with "System 8MHz" I assume it means GLUE?

/Troed

[exxos]

8MHz from the MMU is "broken" via jumpers for various parts of the system... You would have to look at the schematic to see where they are all going..

https://www.exxosforum.co.uk/forum/viewt ... =78&t=2167