exxos's DFB1 trials

Discussion and support for the DSTB1 & DFB1 boosters by BadWolf..
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Re: exxos's DFB1 trials

Post by exxos »

Badwolf wrote: 20 Jun 2023 15:17 I'd play with the inline termination resistor on the CPU clock line. 100R, perhaps?
Good thought.

The clock looks pretty good how it is now. x1 scope probe and it seems a little more stable. This is why I put a buffer on there, But that has its own consequences :lol: :roll:

I just ran FPU test at 50MHz and it all passed. Though the keyboard is still acting up.
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Re: exxos's DFB1 trials

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So this is 22R and 100R clocks.

22R.JPG
100R.JPG

It does seem more stable and the keyboard repeat does seem to work a lot more stable. However it locked up halfway through a GB6 run.

It does seem more stable with the scope on it still even on X10 :shrug:

But I do not think it is that simple, because looks like increasing the resistor had the same effect of adding the buffer in that ST RAM speed has now dropped I think.


The first few tests shows slower speeds.
IMG_0721.JPG

RAM test alone locks up :(

IMG_0722.JPG

Ironically the RAM test does seem to complete but it fails as above when trying to redraw the main window :shrug:

I don't really understand this because RAM test should be the simplest thing because the CPU would be running at 16MHz. So I suspect something is tripping up somewhere relating to ST RAM access @Badwolf ? :shrug:
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Re: exxos's DFB1 trials

Post by stephen_usher »

Seeing the talk about sinking current etc. Would it be possible to only drive lines when they're low and go high-Z for high and let pull-ups do the work? Then you wouldn't risk one chip trying to fry the other.
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Re: exxos's DFB1 trials

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stephen_usher wrote: 20 Jun 2023 16:45 Seeing the talk about sinking current etc. Would it be possible to only drive lines when they're low and go high-Z for high and let pull-ups do the work? Then you wouldn't risk one chip trying to fry the other.
That's what BW's last code changes were to fix. I don't think any lines are actively driven high :shrug:
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Re: exxos's DFB1 trials

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exxos wrote: 20 Jun 2023 16:42 I don't really understand this because RAM test should be the simplest thing because the CPU would be running at 16MHz. So I suspect something is tripping up somewhere relating to ST RAM access @Badwolf ? :shrug:
Much more switching going on with an ST RAM test run from AltRAM. Should most certainly not turn out slower (I'd expect slightly over 100%). Perhpas 100R is too much as the amplitude of the 50MHz signal looks very low.

Your delay only applies to FPUCS, correct?

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Re: exxos's DFB1 trials

Post by Badwolf »

exxos wrote: 20 Jun 2023 16:49
stephen_usher wrote: 20 Jun 2023 16:45 Seeing the talk about sinking current etc. Would it be possible to only drive lines when they're low and go high-Z for high and let pull-ups do the work? Then you wouldn't risk one chip trying to fry the other.
That's what BW's last code changes were to fix. I don't think any lines are actively driven high :shrug:
I drive virtually everything all the time except when I specifically oughtn't. High speed and open drain generally don't go hand in hand.

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Re: exxos's DFB1 trials

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Badwolf wrote: 20 Jun 2023 16:55 Your delay only applies to FPUCS, correct?
Yep.

I have put the 22R back in now.

I've taken out AS from the clock switching code and it ran ST RAM test fine. I am running GB6 from alt-ram now and it locked up after a couple tests.

I just have to kinda assume the CPU can't do 50MHz.. But I don't really believe that exactly as they worked in the ST536. But I guess its a ST vs Falcon so something could be under more strain than on a ST I guess :shrug:

Maybe the cache in the 030 is causing ST RAM issues if it's trying to read from the cache and it gets corrupted that way and crashes.

Saying that, the TF536 does have the bus buffer/isolators which could be a factor in all this :shrug:
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Re: exxos's DFB1 trials

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exxos wrote: 20 Jun 2023 17:00 I've taken out AS from the clock switching code and it ran ST RAM test fine. I am running GB6 from alt-ram now and it locked up after a couple tests.
AS out of the clock switching code?! It'll be switching down on any matching noise on the address bus. Don't do that.
I just have to kinda assume the CPU can't do 50MHz.. But I don't really believe that exactly as they worked in the ST536. But I guess its a ST vs Falcon so something could be under more strain than on a ST I guess :shrug:
Ceramic CPU? I've never got a plastic to run relaibly at 50, but I know others have. Ceramic one really ought to.

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Re: exxos's DFB1 trials

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Badwolf wrote: 20 Jun 2023 17:08 Ceramic CPU? I've never got a plastic to run reliably at 50, but I know others have. Ceramic one really ought to.
They all ceramic. Though I have got 2 plastic which ran in the TF536 fine, but can't with one of the plastic ones even at 40MHz on the DFB1.
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Re: exxos's DFB1 trials

Post by exxos »

50MHZ CPU & FPU - GB6 in ST RAM

50MHZ-STRAM.jpg


50MHZ CPU & FPU - GB6 in ALT RAM

50MHZ-ALTRAM.JPG

50MHZ FPU TEST
50MHZ-FPU.JPG


Pink bucket

IMG_0724.JPG


FIRST TEST OF ALT-RAM

IMG_0727.JPG

64MB I presume ?
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