Blitter on H5 Test

General discussions or ideas about hardware.
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exxos
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Re: Blitter on H5 Test

Post by exxos »

ijor wrote: Mon Dec 19, 2022 12:15 pm But it depends more on the bus activity at the end than at the start of the DMA sequence. Wait states, such as when accessing a I/O location, need to be generated for the BGACK delay to be significant.
Ironically that sounds like what I was trying to do when I restarted the DMA investigation not long ago. I asked Jookie to do various accesses to ROM as much as possible before and after doing a DMA cycle to see if it tripped up and corrupted the hard drive. But the problem was I could not find a STE was actually malfunctioned at the time and nobody came forward either :roll:

The bottom line was it would always corrupt the hard drive when creating a folder or saving desktop etc. Though it could pretty much run sector test on the hard drive all day and be lucky to get it to fail once or twice during that time.So it had to be some sort of command sequencing of some sorts causing the problem. Though so far I have not been able to work out the actual "sequence of events" which leads to the failure. Other than saving desktop.inf that is.

This could well be related to the BGACK pullups as well. Atari did have that as a fix in their own documentation relating to the hard drive IIRC. Though it would seem it also effects blitter access as well. It could possibly explain why the HC CPU works better. Probably does not "load" BGACK as much as a NMOS CPU. But even switching brands of processor could make or break DMA access. So is all down to tolerances of every particular board again.

Problem also being I don't think anyone documented what the pullup values were at the time of the original research. Looking back through my notes someone did change it from 2.2K to 1.2k and is solved the problem. But there have also been DMA issues with later STE's as well and even the "good DMA" chips. So is not just solely down to that one resistor value. Indeed there was multiple problems relating to DMA access anyway. The H5 had all the fixes I knew about the time of its production and I don't believe anyone has ever reported any hard drive problems. But then again we are all using the HC CPU AFAIK anyway.

Sorry folks for slightly topic drifting again but it is somewhat also related :)
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Cyprian
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Re: Blitter on H5 Test

Post by Cyprian »

ok
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