DSTB1 exxos first tests & experimental firmware.

[exxos]

Ahh somethings tripped up..

IMG_0519.JPG (325.96 KiB) Viewed 2111 times

[exxos]

@Badwolf Is the clock switching supposed to be like that ?

IMG_0520.JPG (51.01 KiB) Viewed 2102 times

[Badwolf]

@Badwolf Is the clock switching supposed to be like that ?


IMG_0520.JPG

Looks about right. You can get up to a full period on the slow clock before the switch down occurs if you're unlucky.

It's on my to-do list to try and implement a better switch, but I've not seen any material problems with this & it's bloody reliable.

The only time you'd see an issue, I think, is if you dropped below the minimum frequency for the dynamic core.

BW

[Badwolf]

Ahh somethings tripped up..


IMG_0519.JPG

EDIT:

Might be a bad connection on the CPU..hmm.. or maybe not..

Oh, that's not good. Frank's having AltRAM problems (which I didn't & it got a bloody good soak test) on his DFB too. Bloody difficult to debug remotely.

Can you try flashing the 'stock' JEDEC again in case it's a compilation issue? https://github.com/dh219/DSTB/blob/main ... 220418.jed

BW

[exxos]

Can you try flashing the 'stock' JEDEC again in case it's a compilation issue? https://github.com/dh219/DSTB/blob/main ... 220418.jed

I could but id be stuck with TOS104 ATM.. so wouldn't be able to install alt-ram ?

I thought it could have been the CPU overheating as putting a fan on it made it work again.. But I just recompiled the software testing something out, and I heated the CPU up for 30 seconds with my gas soldering iron.. The thing was pretty much smoking and it has not tripped up on YAART yet. So I do not think it is the CPU having thermal issues.

EDIT:

Fast output slew and it's done its first pass of YAARTTT (it never got anywhere near that far before) .

[Badwolf]

Ah, the TOS decoding? Mmm.

The reason I suggested the original firmware is it disables the blitter again.

The problems I was having related to timing -- that additional AND term (altram request from the cpu AND altram request from the blitter) was enough to knock the SDRAM timings out.

If you put it back and it works, you're just seeing the same problem & the reason it's shipped with blitter ignored.

OTOH, you may be able to simply remove that term and recompile. Or I'll leave you you to experiment yourself. Just be aware it's that AND term that was my main issue.

BW

[exxos]

@Badwolf It seems to be passing just fine now anyway.

[Badwolf]

@Badwolf It seems to be passing just fine now anyway.

My key tests for those timings was MiNT. I know you're not a MiNT user, but we'll need to try that out before shipping it.

I won't have time today, but if you let me have your JEDEC, I'll give it a crack here.

Cheers,

BW

[exxos]

I won't have time today, but if you let me have your JEDEC, I'll give it a crack here.

Did you try it out ?

[Badwolf]

I won't have time today, but if you let me have your JEDEC, I'll give it a crack here.

Did you try it out ?

Sorry, not yet. I think it needs a proper test and my desk at home is full of a different project ATM!

Got a big queue of things to test on both machines too and now I'm away for the weekend. I'll be off having dinner by the sea with the missus going '...I still haven't tested the lastest Basilisk with c2p conversion...'

BW