Falcon clock patch investigation 2022

[Plagued]

so, I gave my old bird a good poking..... ehm
Not trying to diagnose anything, but just checking that I could indeed get my scope to show something.
attached is the input cpuclk line up from the r222 pad to your v2 mod then the a,b,c lines back to the r221,r222,r216 pads
all 10ns. Ignore alignment i was messing with vertical position.
The main clock is -500mV to 5.34V but the others are all around -100mV to 3.5V.
CPUCLKA up to the FPU looks a bit sad.

plagued_falcon_CLOCKS.jpg

[exxos]

Cool. Yeah the FPU and SDMA clock are the same signal :( The voltage is "low" because of the classic method of using an inverter. I'm using higher voltage buffers on the V4. So you get better logic levels and the FPU / SDMA clock gets implemented a bit different.

Hopefully won't be to long until the new boards arrive :)

Edit:
I assume you're using x10 probes as x1 can give you odd results else.

You also need to measure the fpu and sdma clock directly . what's at the v2 end will be different then the fpu / sdma clock ends.It like a "Y" type track when the v2 is at the bottom. Fpu top left, sdma top right. 3 points and you will likely see different waveforms even though they are the same signal.

[Plagued]

Yea 10x. I did check the FPU directly and it was (without actually overlaying) the same, or rather same-enough.
But I'm more than happy to ensure I'm using the correct points to get some comparable values. I could even dig out the grounding spring :p
I haven't actually properly tested the FPU since it was fitted (it was from a batch from China, when you were out of stock) so it's entirely possible that it's slightly dodgy. I should probably let it run for a while. I could also pop it out and check what the signal looks like without it.....This is, if it's not completely normal for the FPU clock to look like that.

[exxos]

I could also pop it out and check what the signal looks like without it.....This is, if it's not completely normal for the FPU clock to look like that.

Would be useful to check with and without the fpu in place. But I doubt there be a huge difference. Though check the clock on the SDMA end near the "boot leg" track as it should look a little better there. The patch was designed to give the best clock there. But the fpu never got the same attention on any patches. Hence the redesign on the V4.

The new PCBs are on their way. So hopefully they be here end of next week.

[Rustynutt]

Great work Exxos :)
Didn't mean to drop out of the buffer thread. Did spend hours (unfortunately seat of the pants) chasing SDMA issues on the Afterburner with the double buffer version.
Even placed a ripple counter on the SDMA clock attempting to slow data transfers from the 16MHz bus to 8MHz. It worked in a fashion, not reliable.
The Afterburner utilizes an PLL clock distribution chip (88915), and also tried pulling an 8MHz clock from it to the SDMA with similar results.
Reason I'd tested this is found using a standard F04, SCSI transfers became reliable running the Falcon bus at 13 MHz.

Also, Uwe mentions the Afterburner has some kind of problem where his accessory program traps DMA transfer size to a preset number. That didn't work.

So for now, when using SCSI, simply down clock from 46/23 (on the AB040) to 1/2 CPU using a small program.

Like you requested, I'd really need a scope, and a few lessons to evaluate the V4 board on this bastion :)
I hear Santa is bringing me one this year, hope to follow up and obtain a new version of your work.

Some of the technical reads, had read about and tested some of the various termination methods. Without a scope though could only document pass or fail.

About the FPU trace, I'd thought about that. As it forks off, and without an FPU present, how should, if at all, that line be terminated?

So far, with the AB, my best results have been to run a single line to the SDMA.

Be nice to eliminate that line using the new design :)

[exxos]

I can send you a V4 kit to at least try. Though I am not sure when I will get back to it. Certainly after Christmas time now.

With or without the FPU the signal should probably still be terminated the same way. BUT all the tests I did are relating to the V4 design. So you cannot really "cherry pick" items from this thread and implement it on another clock patch design as it could possibly malfunction.

[Rustynutt]

Got you :)
Christmas or after is fine for me, last I'd looked into this determined without a scope it's useless, as least with the Afterburner variable.
Not to get far off topic, most my experience with scopes was 12 years ago using older Textronic equipment.

Would this be a good unit to purchase?
Going for the 100MHz for looking at the CT60 too.
Thanks for your opinion :)

Screenshot_20221120-140735~2.jpg

[exxos]

Would this be a good unit to purchase?
Going for the 100MHz for looking at the CT60 too.
Thanks for your opinion :)

Spec wise looks comparable to the rigol. I have the 2 channel version. Fine for a entry level scope. Though normally you only get 100mhz into a single channel. All 4 be 25mhz. So be careful there. If you want to discuss scopes then best open a topic in the electronics forum. There's probably similar threads already.

[Rustynutt]

One of the reasons I slacked off following your buffer work, and installing the resistor mod. On my original 1993 Falcon, finally broke off the clock-in pin after years of fiddling.
After wiping tears away, set it up carefully on a micro drill press, and using a .5mm carbide endmill going into a carefully located pilot hole, cut down until metal showed. Not something I'd recommend, but did keep me from trying to desolder it :)

Good as new :lol:

.

274074806_4876149742472811_7772632996661257977_n.jpg

[Steve]

Ouch, always safer to solder to a cut trace rather than the pin itself, for these reasons :) or the times I've had to solder to a leg, I pull the leg up then put some epoxy underneath to hold it strong, so it never breaks, then solder to it.