BLITTER RE-CREATION THOUGHTS

Progress on our FPGA cores.
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mrbombermillzy
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Re: BLITTER RE-CREATION THOUGHTS

Post by mrbombermillzy »

Icky wrote: 21 Oct 2022 18:26
No hardware issues, however we are dealing with real hardware here and we need a bench mark to compare against. Definitively running real hardware test programs on both original blitter and a FPGA one will help to see if they are indeed matching or something is out. In fact as we progress having other test programs or suites would be good.
I've just started a voyage of discovery with the blitter, to test any practical application for the displaying of graphics. (I'm starting by trying to find out the lowest granularity blit size in words and if there may be some extra 'free' blits that can be done for the same write timespace/cycle amount). I'm still at a very early stage of progress, so bear with.

Anyway, I have an easy to visualise test program which does one 2-16 write (with 8px write granularity) blit line to the top border area. I have turned off ints and the mouse, but as I'm using a jump to the TOS VBLwait routine plus ~6000 NOPs, there is still significant jitter and therefore work needed (40 px to just under a raster! Not shown in the below HATARI screen captures.) Screens showing 16, 2 and 9 blits, respectively:


Picture1.JPG
Picture2.JPG
Picture3.JPG

Anyway, its a 'test'. You are more than welcome to it if it helps. :D

I will actually have more advanced test programs as time progresses, but I fear my pace of work may be too slow to be any use to you :(
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Cyprian
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Re: BLITTER RE-CREATION THOUGHTS

Post by Cyprian »

I would suggest to you to synchronize the CPU with the beam to get raster stable and then do the the blitting:

Code: Select all

SyncBeam:
; ---------
; VBL Synchro
		lea		$ffff8209.w,A0		; ---------

sync						;
		move.b	(A0),D0				;
		beq.b	sync				;
		not.b	D0				;
		lsl.b	D0,D0				;
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mrbombermillzy
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Re: BLITTER RE-CREATION THOUGHTS

Post by mrbombermillzy »

Cyprian wrote: 24 Oct 2022 19:02 I would suggest to you to synchronize the CPU with the beam to get raster stable and then do the the blitting:
I've done that before on the TT and I'm well aware a WaitVBL call is not great for precision. It was just a quick 'proof of concept' (Had a VBL wait routine handy at the time, so just used that for now). Will probably start my own thread once I have something a bit more substantial to show.

Thanks for the tip though. ;)
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Re: BLITTER RE-CREATION THOUGHTS

Post by Cyprian »

mrbombermillzy wrote: 24 Oct 2022 19:42 Will probably start my own thread once I have something a bit more substantial to show.
very good idea,
ATW800/2 / V4sa / Lynx I / Mega ST 1 / 7800 / Portfolio / Lynx II / Jaguar / TT030 / Mega STe / 800 XL / 1040 STe / Falcon030 / 65 XE / 520 STm / SM124 / SC1435
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Icky
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Re: BLITTER RE-CREATION THOUGHTS

Post by Icky »

Cyprian wrote: 24 Oct 2022 20:08
mrbombermillzy wrote: 24 Oct 2022 19:42 Will probably start my own thread once I have something a bit more substantial to show.
very good idea,
Actually a really good idea @mrbombermillzy / @Cyprian. I think a thread on Blitter Testing to put all the prgs etc to test and thoughts etc would be great from the two of you
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Re: BLITTER RE-CREATION THOUGHTS

Post by mrbombermillzy »

ijor
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Re: BLITTER RE-CREATION THOUGHTS

Post by ijor »

Icky wrote: 27 Oct 2022 11:38 Actually a really good idea @mrbombermillzy / @Cyprian. I think a thread on Blitter Testing to put all the prgs etc to test and thoughts etc would be great from the two of you
Hi Icky. Did you perform some tests with the cores?

Somebody tested my core on real hardware and got the same exact results I got with the MiSTer. Are you sure you aren't having any hardware issues? Are you testing on an H5 motherboard or on an original ST? (or both?)
http://github.com/ijor/fx68k 68000 cycle exact FPGA core
FX CAST Cycle Accurate Atari ST core
http://pasti.fxatari.com
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Re: BLITTER RE-CREATION THOUGHTS

Post by exxos »

ijor wrote: 27 Oct 2022 18:31 Somebody tested my core on real hardware and got the same exact results I got with the MiSTer.
Who and with what hardware exactly ? I'm not aware of anyone who has ever tested a drop in replacement blitter core before other than Wolfgang when he was creating Suska originally.
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Icky
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Re: BLITTER RE-CREATION THOUGHTS

Post by Icky »

ijor wrote: 27 Oct 2022 18:31 Hi Icky. Did you perform some tests with the cores?

Somebody tested my core on real hardware and got the same exact results I got with the MiSTer. Are you sure you aren't having any hardware issues? Are you testing on an H5 motherboard or on an original ST? (or both?)
Unfortunately not, as real work has got in the way over the last few weeks and am still working through digging out all the blitter work I did a few years ago and getting my head back around it. Hardware is not an issue and we are testing on H5 as well as original ST as we have drop in replacement blitters for both.

This is the first I am hearing about your core in original HW, wasn’t mentioned before.
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Re: BLITTER RE-CREATION THOUGHTS

Post by ijor »

exxos wrote: 27 Oct 2022 20:26 Who and with what hardware exactly ?
Someone from Poland that it is also working on some of those ATX ST motherboards. I understand he tested it both on original hardware and an ATX motherboard.
Icky wrote: 27 Oct 2022 21:07 Unfortunately not, as real work has got in the way over the last few weeks and am still working through digging out all the blitter work I did a few years ago and getting my head back around it.
May be you could publish your work and some of us could help. If you don't want it to be fully open, may be in some private area, perhaps?
Hardware is not an issue and we are testing on H5 as well as original ST as we have drop in replacement blitters for both.
Oh, I see. Conceivably, it could be an issue with the adapters. But I understand you are using transparent switches that should be, well, completely transparent. Still, some traces and scoping might be helpful, just in case.
This is the first I am hearing about your core in original HW, wasn’t mentioned before.
I wasn't aware either. He contacted me because he is interested in using my other ST/STE cores as well.
http://github.com/ijor/fx68k 68000 cycle exact FPGA core
FX CAST Cycle Accurate Atari ST core
http://pasti.fxatari.com

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