C100167 MEGA ST REV 4

[exxos]

mega4.jpg

[rubber_jonnie]

My REV 4 showing the grubbiness on the PCB and the missing sound chip.

IMG_20191011_145311.jpg

[PaulJ]

Jon, looks like the glitter is gone. :dizzy: Wonder what other issues it has?

[rubber_jonnie]

Former owner said he had problems with the Glitter, something I intend to rectify 😁

Once the RAM and Floppy are sorted, glitter is next. Sound chip is already done, but not tested.

I was hoping to get a KB wired up temporarily, but a problem with our central heating not working diverted my attention!

[rubber_jonnie]

Here's the after pic:

IMG_20191019_161452.jpg

Glitter fitted, sound chip fitted, new floppy plug fitted and header fitted for new RTC power lead. Not to mention fixing the bent ROM pins!

Mostly running fine, got to run Gembench and see what's going on.

TOS says 2MB, Diag cart says 4MB, so that's odd, but otherwise much better than when it arrived.

[stephen_usher]

:dualthumbup:

[jwd]

That looks like a Mega 2 only because in the Spectre GCR manual it states that 2x SGS buffer chips needs replacing for stability (in general not just for Spectre GCR) :

Mega 2 problems.png

Can't see those SGS buffer chips in any of the other motherboard pics.

[exxos]

Interesting article I had not seen it.Thanks for posting it.

I would surmise that changing the bus pullups would have a better / similar effect. Sounds like the age-old problem of changing tolerances of circuit just enough to get it working kind of fix.

I don't know how that the thing fits but.. The pulldown current of the LS chips is typically like 20mA or more. The pullup , at least on the CPU bus, is done via the 10K pullups, which is 0.5mA! So driving the capacitance on such a weak pull-up is basically madness hence why I have been saying for years they need changing because they are unstable.

[ijor]

That looks like a Mega 2 only because in the Spectre GCR manual it states that 2x SGS buffer chips needs replacing for stability (in general not just for Spectre GCR) :

Very interesting document and info!

I would surmise that changing the bus pullups would have a better / similar effect. Sounds like the age-old problem of changing tolerances of circuit just enough to get it working kind of fix.

I don't know how that the thing fits but.. The pulldown current of the LS chips is typically like 20mA or more. The pullup , at least on the CPU bus, is done via the 10K pullups, which is 0.5mA! So driving the capacitance on such a week pull-up is basically madness hence why I have been saying for years they need changing because they are unstable.

I think they are two separate issues, even when possibly related. This is not an open drain bus. The pull-ups are there just to avoid the signals being floating when the bus is idle. They don't actually pull-up the bus (not significantly) when an active transaction is being performed. The CPU, or the peripheral, actively drives the bus both low and high.