exxos wrote: 07 May 2022 02:46
But I keep forgetting how you say sdram works. But with refresh cycles in the mix and a "slow" CPU at 8mhz,
Shouldn't make any difference -- my controller
should take care of all that. But...
I'm starting to think it's getting more trouble than its worth with SDRAM. It was a bit fickle on the TF536 as well. :roll:
Too right! 80% of all my dev time has been on bloody SDRAM. That said, the price... the volume... Gah!
Did start designing a latched version of DSTB1 to try and reduce the SDRAM PITA factor, but I couldn't quite make them fit on the board (as they're unidirectional so require two 16 bit chip + control lines). I went with what I know in the end. If I had unlimited space, I'd try that next.
Screenshot 2022-05-07 at 12.15.50.png
(there is actually one chip on the top side and one on the bottom for 'in' and 'out'!)
But anyway, back to the point in hand...
BW
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