[Video] A look at the (alpha) STE PLCC to DIP CPU relocator

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Badwolf
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by Badwolf »

exxos wrote: 23 Dec 2021 22:36
Badwolf wrote: 23 Dec 2021 22:11 What's the top speed of a genuine 68k before we get into SEC territory? Was 16MHz the limit?
Not really sure as there was a lot of problems back then as I was using sync clocks.. I think some would push 28MHz. But I have a feeling they started to struggle at 24MHz.
These were badged as 16, though, were they?

I think 16 is not unreasonable for an old-school 68k.The SEC route seems sensible for higher speeds to me.
The pullups would help a lot, but nothing I ever tested. Normally once you get like a inch of track length your already into problem territory. Think I would be surprised if you even get to 32Mhz on a ribbon cable. I would actually expect more like 16Mhz or just not working at all.
Yeah, bit of a spitball. :)
I may port the SEC booster to the STE one day. But theres never enough interest in the STFM one to really produce them. Fast-ram makes it more attractive of course, but the price of SRAM "back then" was adding up to like £100+ just in parts. We all really need is a 68K footprint SDRAM board *hint* ;)
One day. One day! :D
The Veloce fitted in the STE case. That was a fairly large board. https://www.exxosforum.co.uk/forum/viewt ... loce#p6483
That's fitted so low down they've hot snotted it to the mainboard! But good example of using the space, though.
Possibly if you soldered the 68K into the board instead of the socket, I would assume the keyboard would fit then ?
The obvious thing to try is if the keyboard fits *without* the 68k. That'd give an closer approximation to a board-on-board fit. Will have a go with that later.

Still, this is awesome. Thanks, Exxos. :)

BW
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by Badwolf »

Steve wrote: 23 Dec 2021 23:42 Since the board has its own pull ups are you supposed to remove the standard ones on the motherboard, similar to the 32mhz booster? I assume
I don't intend to. After all, that gives me MOAR PULL UPS! :)

BW
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

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Darklord wrote: 24 Dec 2021 02:08 Not sure if the Turbo boards were "true" 68000's or
not but they ran in 25, 28, and 36mhz varieties...

Here's a picture of a T-25 I had and an ad...
Interesting. So your 25 was an overclocked 16. The ad shows a PLCC version so I wonder if they performed better when overclocked, or whether that was a higher rated CPU?

Anyway, a 68K accelerator for the STE wasn't really what I was thinking about now, but since the board popped up it's great to have a little look.

Like Exxos says, memory is probably a better route to go down, especially when the work has been done on SEC. With my new ACSI2STM I did what any sensible STE owner would do and installed the bootable MiNT snapshot. Just under 1 megabyte free :-D

Like with DFB1, anything I do will likely be memory first.

This 68K chip is actually intended for my Falcon, if you can believe that :?

BW
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by sporniket »

exxos wrote: 24 Dec 2021 10:02
sporniket wrote: 24 Dec 2021 03:10 A little question : what is the meaning of "SEC" ?
https://www.exxosforum.co.uk/forum/viewforum.php?f=82
Yes, I understood that it was about your booster, and does "SEC" means something, like e.g. "Super Exxos's Contraption" (the 'C' is not easy to find something :D )?
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by exxos »

sporniket wrote: 24 Dec 2021 13:14 Yes, I understood that it was about your booster, and does "SEC" means something, like e.g. "Super Exxos's Contraption" (the 'C' is not easy to find something :D )?
Works for me :)

https://www.nxp.com/docs/en/product-bri ... SEC000.pdf
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by Darklord »

Badwolf wrote: 24 Dec 2021 12:41
Interesting. So your 25 was an overclocked 16. The ad shows a PLCC version so I wonder if they performed better when overclocked, or whether that was a higher rated CPU?

Anyway, a 68K accelerator for the STE wasn't really what I was thinking about now, but since the board popped up it's great to have a little look.

Like Exxos says, memory is probably a better route to go down, especially when the work has been done on SEC. With my new ACSI2STM I did what any sensible STE owner would do and installed the bootable MiNT snapshot. Just under 1 megabyte free :-D

Like with DFB1, anything I do will likely be memory first.

This 68K chip is actually intended for my Falcon, if you can believe that :?

BW
Not sure, honestly. One thing I know, that's been hammered into my consciousness over and over by multiple people, is
that the cache is mandatory, not optional...and that with the higher clocked T boards, the blitter had to be disabled.

That particular T-25 was for a regular ST, not STe, btw...
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

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Darklord wrote: 24 Dec 2021 18:00 One thing I know, that's been hammered into my consciousness over and over by multiple people, is
that the cache is mandatory, not optional...and that with the higher clocked T boards, the blitter had to be disabled.
I did some experimenting with hacking the clock over the xmas hols (video pending, but it's a bit all over the place *hic*) and I can see why this is key.

Effectively there's only about a 10% gain with clock switching alone (950 versus 860 frames on Frontbench). Cache and/or AltRAM definitey the way to go.

I believe Exxos' boards enforce faster ROM access too and some of my experiments on that field backed that up as having a great effect on desktop use (~140%), but obviously not reflected in games that don't use the OS.

Edit: I forgot to mention that the biggest problem with getting it to work at all was the blitter, actually. Not sure if that's related to it needing to be disabled above, but use of the blitter with my my clock switching was completely unstable. I couldn't obviously see why. I added sniffing BGK to my switching logic to overcome it.

Anyway, just a bit of fun over xmas. Attention's turning to rev 5 of DFB1 again. :)

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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by Darklord »

It's always interesting to me, to see what works and what doesn't.

The faster T-boards required the blitter to be removed, the Pak boards do, etc,...

But lower speed T-boards I don't think did and the AdSpeed I have in my Mega ST4
doesn't either. It and the blitter get along just fine.

From the Exxos's posts and my conversations with him, I do seem to have one of
the (very) few Mega ST's with a decently stable bus. I've never done anything extra
to it - no pullups, nothing. I plugged the AdSpeed into it and everything just
worked. As well as the Cloudy and Lightning ST boards. Which is why I'll be gone
before that machine is... :)

The AdSpeed has an option to use "fast" TOS ROMs - it's described in the docs. I
never got around to adding that and by the time I thought about it, I'm told that
those chips are impossible to find now. Oh well...would have been interesting
to see how much of a performance gain would have been achieved. :)
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Re: [Video] A look at the (alpha) STE PLCC to DIP CPU relocator

Post by Badwolf »

exxos wrote: 23 Dec 2021 22:36 Incidentally, you probably know why I am spending so much time in creating a 3-D printer which actually is accurate now ;)
This is what I'm using at the moment. I think it needs a little tweak to be slightly wider (it's hard to align on all the pins at the moment), but it's simple to print as it has about 2mm flex and will apply a bit of back pressure.

Not sure what its longevity will be, though.

IMG_5046.jpeg

STL attached for anyone interested.

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