DFB1r4 design discussion thread

[Steve]

Hey @Badwolf I'm just wondering what clock patch is on your Falcon. Would that be part of the equation.

[exxos]

Hey @Badwolf I'm just wondering what clock patch is on your Falcon. Would that be part of the equation.

https://www.exxosforum.co.uk/forum/viewt ... 532#p68233

[Steve]

Hey @Badwolf I'm just wondering what clock patch is on your Falcon. Would that be part of the equation.

https://www.exxosforum.co.uk/forum/viewt ... 532#p68233

I wonder if badwolf has the 'new' resistor on the sdma line. falcons without it would get freaky DSP issues sometimes.

[exxos]

I wonder if badwolf has the 'new' resistor on the sdma line. falcons without it would get freaky DSP issues sometimes.

@Badwolf ? Though I don't think he has issues on a stock machine.

[Badwolf]

Ah, no. I don't have the 150k pull-down up on the SDMA chip. I've never had any DMA issues AFAIK (even before the clock patch went on last year) so am tempted not to change too many variables at once.

That said, I was watching Gadet's latest video where he was having freezes during certain accesses, but I had assumed that to be DMA rather than DSP.

The whole DMA/DSP interaction is a bit fuzzy to me. I have them in different problem pots in my mind.

I suppose it wouldn't hurt to scope the pin in question. I did read and understand what the problem was and what the pull-down was addressing, but hadn't thought it might apply here.

Cheers,

BW.

[exxos]

That said, I was watching Gadet's latest video where he was having freezes during certain accesses, but I had assumed that to be DMA rather than DSP.

He had a thread on here about it somewhere.. he didn't add the pulldown as he didn't read all the page

EDIT:

https://www.exxosforum.co.uk/forum/viewt ... 574#p69311

[Badwolf]

He had a thread on here about it somewhere.. he didn't add the pulldown as he didn't read all the page

https://www.exxosforum.co.uk/forum/viewt ... 574#p69311

Cheers, @exxos. That doesn't sound quite like my issue (and I still have that one board that bizarrely works!), but I'll put that on the list for investigation anyway.

In other news, I've got more proficient at understanding CPLD fitting reports and have implemented some shortcuts that have let me been able to fit a basic SDRAM controller *and* still compile the verilog in speed mode.

Doing some testing at the moment but initial impressions, whilst noting not everything's perfect, look much improved at 40MHz at least. DSP test is passing and mostly functioning, if not the world's speediest, AltRAM is in place.

Fingers crossed I'm over the peak...

BW

[Badwolf]

Quick update. Had a bit of a go on the SDRAM code again today. It's not bad.

At 40MHz, I've been running Doom in a window with YAARTT going in the background for an hour or two without problems. There was an occasional stutter earlier, but I think that may still be my shonky bus arb code. DSP seems to be passing still, which is massive.

The FPU's still not quite right, but I'm putting that down as a nice to have.

Further things to consider:-

• Am I convinced SDRAM is stable?
• Keep watching the DSP -- more BadMood tests?
• Can we get to 50MHz? There's this strange reset bug I mentioned before where the board doesn't come out of reset when I boot with a 48MHz oscillator, but will at 40. Delaying when it can go 'high speed' seems to work, but I find this very odd.
• WTF is up with the FPU?
• Another spin to fix the bodge wires?

I'm not sure I'll mark all these off before release. I'm pretty close to calling it good enough, TBH.

Cheers,

BW.

Edit: Doom not Quake. Quake’s a slideshow.

[exxos]

Cool! Sounds like things are taking shape finally

[Badwolf]

Cool! Sounds like things are taking shape finally

Thanks. Yes, definitely making progress now. Putting it through its paces ATM.

Still not 100% sure about the DSP, though. DMA2DSP passes nicely but other DSP programs aren't so reliable. Could just be timing related, I suppose.

BW