Flashy Clock - Yet another DEV board

[Icky]

I still need to catch up on this, but likely be a couple more weeks before I can get back to this :(

Though this shows the "stack" with the alt-ram board plugged in. Won't exactly be like this, but gives the idea. The CPU will plug on top of the stack.

:coolpics:

I have also noticed that someone didn't center the 4 pin header on the flashy pcb ;)

:blonde: - I see what I did :( took the centre from the header and socket and not just the header. Oh well bodge wires it is then :)

Good job we have a v4 with some slight fixes in play. Will modify the layout now. Oh the joys of prototyping.

[PhilC]

Wouldn't be the same without some bodge wires now would it?

[Icky]

Wouldn't be the same without some bodge wires now would it?

True

[exxos]

This project is hopefully going to continue next week. I uploaded a image here for the 2 boards... https://www.exxosforum.co.uk/forum/viewt ... 848#p29848

I can't remember where @Icky and I got to with the second board.. likely in a not working firmware version. Though the main firmware updates in this second version is to allow full software control over the ROM selections. Where instead of jumpers, Software can be used to switch between TOS versions. The settings will be stored in a register in the NVRAM module. This has its own challenges hardware and software wise, but I have a plan :)

[Icky]

@exxos - Flashy Clock v3 (the small board) the firmware is working from swapping it over from the DEV board (v2) but it awaiting the addition of reading the register to set the ROM bank.

I have the v3 working but set in firmware to read from Bank 0 at the moment.

[exxos]

@Icky cool. So I just need to start working on the nvram register stuff then :)

[exxos]

Plugged in - progress!

IMG_4739.JPG

[exxos]

Working on the firmware :)

So in theory, a RTC register can be set in software to select the 1 of 4 flash rom banks. With the RTC being NVRAM (battery backed RAM) The ROM selection isn't lost even when powered off.


Also in theory, with some bits banking magical voodoo, when the ST resets from power up for example, the PLD will access the RTC address and recover the Flash ROM bank selection from the NVRAM register.

Basically this is exactly like using physical switches, only it is done in software now, without physical switches.

Hopefully I can get this sorted today.. Famous last words :lol: but in my defence, it all works on paper :lol:

2.JPG

[PhilC]

Sounds like it should work to me, so good luck with getting it implemented in software.

[exxos]

Sounds like it should work to me, so good luck with getting it implemented in software.

Yeah, The firmware is done, just I have to code some new routines in my crappy clock program now which will take a while.