So introducing the Phoenix MMU as the new board we are designing to enable us to develop the MMU chip on the H4/5. This board is not a universal board like the Phoenix BLUE. I'll be locking the other threads in this area on MMU development and this will be thread going forward for our MMU development.
The board is comprised of a Max10 FPGA, 5V <-> 3V3 translators and has a 8x 5V IO pins out for additional connectivity for future development. Its size fits perfectly on the MMU PLCC location on an H4/5 without intruding on any other component on the board. It's as small as we can get it around that PLCC68 form factor.
We have reviewed the design between @ijor, @exxos, and myself and are ready to manufacture an initial boards. Our first batch is for development of the cores and will be larger version of the FPGA to allow us to debug the cores and test additional features in the future but the main objective is to get the cores running correctly as cycle exact chips on real hardware.
We will keep you updated as to our progress with the Phoenix MMU.
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