CSYNC in STe and MegaSTe (for RGBtoHDMI)

Pacman · Post by **Pacman** » Sat Oct 03, 2026 9:13 pm

When adding an HDMI output to an STe or Mega STe (using the Raspberry Pi Zero based RGBtoHDMI) you also need access to CSYNC (Composite Sync).

As I'm in the process of designing an STe/MegaSTe compatible 12-bit buffer board I'm wondering if I should also add CSYNC generating circuitry or if the existing CSYNC signals in these computers suffice and if they even exist in all STe/MegaSTe variations. Some machines come with built-in RF modulators, some don't. I've read that French STe computers don't have RF-modulators.
I don't know what the differences (in regards to CSYNC) are between European PAL and North-American NTSC STe models are either. And I haven't yet done any in-depth research of the MegaSTe in regards to this.

Now, if you scroll down to the bottom of Lukasz Jokiel's blog page on how to connect an RGBtoHDMI to an STe including a modified Amiga 12-bit buffer board there are a couple of sources for CSYNC in an STe:

A) pin 2 of U403 (MC1377) in RF-modulator equipped STe computers
B) in non RF-modulator equipped STe computers there's an alternate location in the area of the (non-populated) RF-modulator. I haven't yet located the exact spot in the STe schematic, but there's a photo on that blog page

So in summary, is CSYNC definitely available in all STe computers, regardless?
How about the MegaSTe?

I've come to understand that CSYNC can be generated from a combination of HSYNC and VSYNC (both available in all STe and MegaSTe systems) using a variety of methods, the simplest being a circuitry built around a transistor (Building a passive sync combiner), a circuit built around a 74LS86, a quick and dirty video sync combiner built around the CD4077 and an FPGA based one (building a clean Atari ST RGB CSYNC signal) to name a few I found online.

I understand there are advantages and disadvantages to all of these, but which one will suffice? And is a separate CSYNC generator type circuit needed at all or an advantage over the already available CSYNC signals mentioned earlier?