Mega ST4 - no video output at all

[ijor]

The diag cartridge might help. But a logic analyzer seems much more helpful in this situation. There are nowadays logic analyzers that cost less than 10USD. Obviously you are not going to buy top quality and specs at that price, but it might be enough here:

https://www.amazon.com/HiLetgo-Analyzer ... 077LSG5P2/

And this is by a (more or less) known brand. There are even cheaper.

[asapreta]

OK, looks like the ROM is being selected then and it's being read a number of times. This is very good news!

Unfortunately without being able to monitor the whole of the data bus and/or address bus with a logic analyser we can't tell if the CPU is getting valid data from the ROMs or the ROMs are getting a valid address.

IF the ROMs are OK then a diag cart with a computer connected to the serial port could well give you useful information.

I have tested these ROMs in my 520STFM and they are ok, TOS 1.2
Hope by the weekend I can have the 27C1001 eeproms ready so I can burn the DiagRoms into them while I try to get a diags cartridge.

[asapreta]

The diag cartridge might help. But a logic analyzer seems much more helpful in this situation. There are nowadays logic analyzers that cost less than 10USD. Obviously you are not going to buy top quality and specs at that price, but it might be enough here:

https://www.amazon.com/HiLetgo-Analyzer ... 077LSG5P2/

And this is by a (more or less) known brand. There are even cheaper.

Thanks for the tip!
I think the one below is a clone/similar from another brand:

https://produto.mercadolivre.com.br/MLB ... er-8ch-_JM

D_NQ_NP_2X_756926-MLB52852329756_122022-F.jpg

It will arrive tomorrow if I get it today.

[ijor]

Thanks for the tip!
I think the one below is a clone/similar from another brand:

Yes, looks about the same thing, but unbranded. Note that it seems that it comes without probes. If so, you might need to get a set of grabbers or otherwise you would need to solder/desolder the wires for each different trace.

https://www.amazon.com/dp/B07BCZSNGS/

[asapreta]

Thanks for the tip!
I think the one below is a clone/similar from another brand:

Yes, looks about the same thing, but unbranded. Note that it seems that it comes without probes. If so, you might need to get a set of grabbers or otherwise you would need to solder/desolder the wires for each different trace.

https://www.amazon.com/dp/B07BCZSNGS/

I noticed that. :(
I will try to buy the grabbers elsewhere but while they aren't available I can solder the wires.

Thanks again!

[asapreta]

The logic analyzer will be delivered today.

Which signals should I track? /CE /AS /CAS /HALT? Data and Address lines?

Yesterday I finished probing the continuity the pins of the major ICs.
No broken traces found. I don't know if it is good or bad.

Also, before the power shortage, I coult test the MFP in my 520STFT. It is working.
I was to test the DMA controller but there was no power then.

I noticed in my 520STFM the DMA controller has a diode in pin40:

WhatsApp Image 2024-10-25 at 09.05.36 (1).jpeg

Can I use the one from the ST4 directly on the socket without connecting the diode?

WhatsApp Image 2024-10-25 at 09.05.36.jpeg

Thanks in advance.

[stephen_usher]

To begin with I'd look at /AS /DTACK and /HALT on the CPU plus A1, A2, A3 and /UDS and /LDS. This is just to see how many reads are happening when the CPU comes out of reset. The three address lines should be counting up as it reads the first four words of the ROM before starting to execute code.

Next I'd go to the MMU and sample /RAM, /DMA, /DEV, /RAS1, /CAS1H, /CAS1L, /LOAD and /CMPCS. This is to make sure that the lines from the GLUE and to the Shifter are doing their thing and to determine when CAS1* stop working. At some point the MMU should be telling the Shifter to read the bus and the chip also putting the address of the lowest word of video RAM on the bus when it does this.

Next I'd look at the data bus and look at the first four lower bytes that the CPU is reading from the ROM after a reset and then compare them to the first four bytes of the lower ROM. This may be able to tell you is the CPU is getting the wrong values due to an address or data line error.

You may want to try capturing the same signals on your working ST to compare.

[asapreta]

To begin with I'd look at /AS /DTACK and /HALT on the CPU plus A1, A2, A3 and /UDS and /LDS. This is just to see how many reads are happening when the CPU comes out of reset. The three address lines should be counting up as it reads the first four words of the ROM before starting to execute code.

Next I'd go to the MMU and sample /RAM, /DMA, /DEV, /RAS1, /CAS1H, /CAS1L, /LOAD and /CMPCS. This is to make sure that the lines from the GLUE and to the Shifter are doing their thing and to determine when CAS1* stop working. At some point the MMU should be telling the Shifter to read the bus and the chip also putting the address of the lowest word of video RAM on the bus when it does this.

Next I'd look at the data bus and look at the first four lower bytes that the CPU is reading from the ROM after a reset and then compare them to the first four bytes of the lower ROM. This may be able to tell you is the CPU is getting the wrong values due to an address or data line error.

You may want to try capturing the same signals on your working ST to compare.

Hello stephen_usher.

I will do these tests. Thanks.

As the first time with the logic analyzer, I was grabing information how this specific one works and guess I need to configure it to grab data from each channel using asynchronous serial UART RS-232 TTL level as protocol (if the "term" is correct) in the Analyzers.

I think the screen will be like this:

analisador-logico-24mhz-8ch-al24.jpg

[stephen_usher]

You shouldn't need any protocol setting at all. Just set the number of samples, the samples per second and rename the channels to what you've connected. You may want to trigger on one of the channels transitioning to low, such as the one connected to /AS, but that's it.

Just hit record, reset the ST and it should record the traces for you.

The software should then allow you to zoom in on the trace using the mouse.

[ijor]

I've been thinking and I think we (or at least me), might have been misguided by the exact symptoms on the CAS signals.

Can you please confirm:

- You have activity for a short period of time in CAS0 (CAS1) after reset.
- CAS1 (CAS2) are constantly high.

Is that correct? If so, where are you probing the CAS signals? At the MMU chip itself, or at some other place like the LS244 buffer? If you didn't probe directly at the MMU chip pins, please do it.

In most schematics these signals are named CAS0 & CAS1, but in the Mega ones, at least in some of them, they are named as CAS1 & CAS2 for some reason.