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It helps build a picture where our "good traffic" is coming from..
Thanks :)
REV 3 - REV 5 - The beginning (ST536)
Re: REV 3 - REV 5 - The beginning (ST536)
Perfect! All set to make the changes tomorrow.
Re: REV 3 - REV 5 - The beginning (ST536)
Hopefully it will be a win... We definitely need more wins!
Re: REV 3 - REV 5 - The beginning (ST536)
If it helps anyone.. This is how I solder the PLD...
Re: REV 3 - REV 5 - The beginning (ST536)
Ok first bottom of the board changes and the PLD are done.
Now I have one more question. The SDRAM modification, does it need to be done to both SDRAM IC's?
Now I have one more question. The SDRAM modification, does it need to be done to both SDRAM IC's?
Re: REV 3 - REV 5 - The beginning (ST536)
It looks like my board is an earlier version with some minor changes, but I'm also having a harder time finding which line is to be connected to the SDRAM.
- IMG_3894.jpeg (335.75 KiB) Viewed 439 times
- IMG_3893.jpeg (272.46 KiB) Viewed 439 times
Re: REV 3 - REV 5 - The beginning (ST536)
Which end? You can count the pins on the SDRAM and PLD to see where the wire goes..coonsgm wrote: Sat Nov 29, 2025 5:34 pm It looks like my board is an earlier version with some minor changes, but I'm also having a harder time finding which line is to be connected to the SDRAM.
The PLD tracks are pointing towards the "50MHz" text..
Re: REV 3 - REV 5 - The beginning (ST536)
Could you share a zoomed out photo of the entire board top and bottom? I can't tell from the current photo which corner of the PLD you're looking at.
Thanks!
Thanks!
Re: REV 3 - REV 5 - The beginning (ST536)
I can but I'm not at home until Tuesday now..coonsgm wrote: Sat Nov 29, 2025 7:07 pm Could you share a zoomed out photo of the entire board top and bottom? I can't tell from the current photo which corner of the PLD you're looking at.
Re: REV 3 - REV 5 - The beginning (ST536)
No worries 
Re: REV 3 - REV 5 - The beginning (ST536)
Alright,
I made all the changes:
I connected the 5th pin on the PLD to the 10th pin on the closest SDRAM IC
Added the 330R to the two pins on the CPU
Connected the two capacitors on the backside
Doubled up all the small birdseed capacitors with 4.7nf's added (dang those are small)
Programmed the PLD with BETA1SS.jed (photo is an in-process, but it did complete and verify)
It looks like the FastRam is having issues...I've used this ROM before with the 144 and it was mostly stable with FastRam working.
Ran Gembench, just because (IDE working just fine)
I'm sure I did something wrong here, so any feedback is much appreciated!
I made all the changes:
I connected the 5th pin on the PLD to the 10th pin on the closest SDRAM IC
- IMG_3903.jpeg (311.75 KiB) Viewed 402 times
- IMG_3906.jpeg (365.04 KiB) Viewed 402 times
Connected the two capacitors on the backside
Doubled up all the small birdseed capacitors with 4.7nf's added (dang those are small)
- IMG_3904.jpeg (315.88 KiB) Viewed 402 times
- IMG_3905.jpeg (192.19 KiB) Viewed 402 times
- IMG_3898.jpeg (362 KiB) Viewed 402 times
- IMG_3901.jpeg (256.29 KiB) Viewed 402 times
- IMG_3900.jpeg (254.72 KiB) Viewed 402 times
- IMG_3902.jpeg (321.46 KiB) Viewed 402 times