TF536 + 68000 relocator and ROM board project.

[stephen_usher]

I was worried about that. I'm guessing the long parallel data lines may be generating cross talk. Also I couldn't work out how to tell Kicad to make the power and ground rails wider.

What happens if you switch to the 68000? How about remove the 68000?

P.S. I should have also put far more vias in on the ground fill.

[PhilC]

@stephen_usher ill try a few bits and pieces in the morning, like swapping the cpus over and seeing if the TF536 works more reliably in the other socket.

[stephen_usher]

Actually, I was thinking about during testing simplifying things by just using stock 68000s and not adding the complication of the TF.

So, my testing process would probably be:

• 68000 in 68000 socket, accelerator socket empty
• 68000 in accelerator socket, 68000 socket empty
• 68000 in both sockets, run tests with each in turn.

With the single CPU tests if there are issues then we can use the other socket to look at the signals using an oscilloscope or logic analyser.

Only once the system is stable with 68000s should we move on to the TF.

How does that sound?

If we need more power and ground at the accelerator socket end then we can replace the capacitor next to the accelerator socket with power and ground pins and feed power directly in from there rather than on top of the TF.

I’m going to replace the stock PSU with an Exxon unit today as that should have a better stability at the higher load that multiple CPUs will add.

[stephen_usher]

Thinking about it, if there's a Mk.II then I'll probably put a ROM socket footprint in the lower left of the board and then not only can /ROM2 be taken off the ROM0-LO socket but also auxilliary power and ground for the left side of the board. Unfortunately I don't think I can put another one under the accelerator socket to get an independent set of data bus lines, so that only the address bus has to travel the whole board.

[DoG]

You also got D0-D15 and A1-A17 on the ROM sockets Lo-0 and Hi-0 if that helps with anything? If you were going to put the ROM on the left side anyway.

[stephen_usher]

Actually, it's the HI-0 ROM socket I'm currently getting /ROM2 from. (Brain fade earlier.)

I'm not sure how useful only having A1-A17 available and letting A18-A24 come right across the board. You're going to get a timing skew. Though seeing as /AS is going to have to travel the board anyway the address bus data should be consistant by the time the other chips receive it.

You also got D0-D15 and A1-A17 on the ROM sockets Lo-0 and Hi-0 if that helps with anything? If you were going to put the ROM on the left side anyway.

I've space to put a set of head pins into the Hi-0 socket, but the Lo-0 socket is directly underneath the accelerator socket and I'd have to try to interlace them, which I don't think is possible.

[DoG]

Ahh, I see. I only thought you needed for a ROM socket on your board. Not the whole 68k socket. But that is a bit stupid since you got the 68k and 68030 on your board I guess.

[PhilC]

Not had any time today other than pack a couple of parcels up. I dud initially try with a 68000 in each socket but no stress testing then, so will give that a go once I get a mo.

[stephen_usher]

OK, no problem. I'm just frustrated I can't join in with the "fun" until the header pins arrive, hopefully tomorrow.

[DoG]

When you run the Pak3/030 and have a 68k on top and ability to switch between them, the 68k gets rather warm when using the 030. So I guess you will need a more powerful PSU in your setups as well, rather then using stock PSU. The "inactive" CPU still draws some power.

Probably thicker power rails and GND is needed. But it seems you already though about that.