- 4.jpg (13.64 KiB) Viewed 2351 times
So if BLANKing was inverted and connected to the /E pins on the AC157s, that should do the blanking as well I think....
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It helps build a picture where our "good traffic" is coming from..
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It helps build a picture where our "good traffic" is coming from..
Thanks :)
VIDEO DAC BRIGHTNESS ISSUE
Re: VIDEO DAC BRIGHTNESS ISSUE
Looking at the AC157 sheet, it has a enable pin...
So if BLANKing was inverted and connected to the /E pins on the AC157s, that should do the blanking as well I think....
So if BLANKing was inverted and connected to the /E pins on the AC157s, that should do the blanking as well I think....
Re: VIDEO DAC BRIGHTNESS ISSUE
As a small note, on the REV F, I have swapped around the RGB & MONO lines on the multiplexers... and wired MONO_DET to the jumper... Its now using the pullup to 5V in RP1. So pulled HI, it defaults to RGB mode, when jumper moved LO, it switches the MUX's to MONO and wires MONO_DET to 0V switching the ST into MONO mode.
I could do with someone hacking in a inverter on BLANKing to the enable pins on the MUX's to see if that works good.. if it does, then we could just forget about the analouge stuff on the DAC... at least on the REV F anyway...
- Capture.JPG (136.72 KiB) Viewed 2341 times
I could do with someone hacking in a inverter on BLANKing to the enable pins on the MUX's to see if that works good.. if it does, then we could just forget about the analouge stuff on the DAC... at least on the REV F anyway...
Re: VIDEO DAC BRIGHTNESS ISSUE
I have been doing some more rejigging on this circuit...
On the DAC analogue inputs, I already added in the voltage divider ( about a week ago,But how things are looking this will likely get removed ).. I added in a jumper to disable the analogue selection ( by connecting it to VCC) or enabling it by connecting it to blanking (which is what is currently on the H4 anyway).
Now the DAC analogue blanking can be isolated totally, I have added in a inverter onto the MUX chips. The MUX enable lines are now called GEN (it was hardwired to 0v before). So when blanking is active (low) this gets inverted HI to the MUX GEN (enables) and this disables the outputs of the MUX to all zeros which is handy, and it ignores whatever is on the MUX inputs.
So when blanking is active, it will zero out all the red green blue lines on the digital side of things. So the DAC will of course output "black" and because we are not using the analog input we should not have any biasing issues.
The 74AC157 MUX's which I stated to use have a delay of about 5ns, so they should be plenty fast enough I think. There are actually faster chips with near zero delays, but these basically are bus switches and these do not zero the outputs when disabled. So if those chips were used, we would have to add another sill array as pull downs. Overall pretty pointless really just to save a few ns.
In any case, it would help if someone could actually try the MUX blanking idea.
On the DAC analogue inputs, I already added in the voltage divider ( about a week ago,But how things are looking this will likely get removed ).. I added in a jumper to disable the analogue selection ( by connecting it to VCC) or enabling it by connecting it to blanking (which is what is currently on the H4 anyway).
- 1.JPG (102.64 KiB) Viewed 2320 times
Now the DAC analogue blanking can be isolated totally, I have added in a inverter onto the MUX chips. The MUX enable lines are now called GEN (it was hardwired to 0v before). So when blanking is active (low) this gets inverted HI to the MUX GEN (enables) and this disables the outputs of the MUX to all zeros which is handy, and it ignores whatever is on the MUX inputs.
So when blanking is active, it will zero out all the red green blue lines on the digital side of things. So the DAC will of course output "black" and because we are not using the analog input we should not have any biasing issues.
- 2.JPG (155.66 KiB) Viewed 2320 times
The 74AC157 MUX's which I stated to use have a delay of about 5ns, so they should be plenty fast enough I think. There are actually faster chips with near zero delays, but these basically are bus switches and these do not zero the outputs when disabled. So if those chips were used, we would have to add another sill array as pull downs. Overall pretty pointless really just to save a few ns.
In any case, it would help if someone could actually try the MUX blanking idea.