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ST536 STE EDITION

All about the ST536 030 ST booster.
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exxos
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Re: ST536 STE EDITION

Post by exxos »

PhilC wrote: Wed May 21, 2025 7:52 pm Oh I thought it was just Steve;s one playing up still?
Nope, different board and firmware.. Steve's ran fine all day without fastrom.

I've got my own board on test now...
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Re: ST536 STE EDITION

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:hide:

8 then :lol:

It will probably crash when I am not watching it... A, bit like 3D printers... And that twin slit experiment where things misbehave were not observed. :lol:
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Re: ST536 STE EDITION

Post by exxos »

Still going... Its on pass 18 now :hide:

Looking like it's going in for a overnight soaktest....
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Re: ST536 STE EDITION

Post by exxos »

:yay: :yay: :yay:

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Re: ST536 STE EDITION

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exxos wrote: Thu May 22, 2025 9:09 am :yay: :yay: :yay:


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Woooooooooooooooooooooooooooooooooooooooyah! :D
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Re: ST536 STE EDITION

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Blitter now happy with fast-rom stuff...

Current scores..

EMUTOS

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exxos TOS206 & BLTFIX.

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Annoying thing is how much of a "hit" TTram takes when running BLTFIX. It wipes out about 121% :shock:

Really TOS206 needs a proper patch for this I think.. but how... now idea.
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Re: ST536 STE EDITION

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OK so back to @Badwolf suggestion..

I am trying to setup a register at the 90MB mark...

BUT..

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:WTF: ive not issued DTACK yet.... and even higher address are acting like RAM... Nothing should be at that mark... unless there some odd decoding error with the TTram logic...


EDIT

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I'm just going to move it to 256MB :P
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Re: ST536 STE EDITION

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exxos wrote: Thu May 22, 2025 2:45 pm Annoying thing is how much of a "hit" TTram takes when running BLTFIX. It wipes out about 121% :shock:
Strange, since there's no trickery or extra stuff that should be running. Ie; there shouldn't be a global overhead per se. mmu is not used etc.

It hooks itself into blitter related system calls, as well hooking tos's drawing routines which can use the blitter, so these calls will do some extra logic to decide between hardware or software blit -- but I assume none of that is being called during a memory speed benchmark.

The program does flush caches at load time, right before it pexit's as stay-resident, but I wouldn't think that should effect this.

Do you see the same kind of difference when benchmarking memory with nembench, or memspeed?
exxos wrote: Thu May 22, 2025 2:45 pm Really TOS206 needs a proper patch for this I think.. but how... now idea.
That would be nice, but it would do pretty much the same as blitfix, which isn't that much really;
In each of TOS's blitter-enabled gfx functions, determine if it should instead jump to the software routine based on the input parameters (source/dest address)
TOS206 has both hardware and software version of those functions already, and decides which one to use only based on the menu setting.
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Re: ST536 STE EDITION

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agranlund wrote: Thu May 22, 2025 5:22 pm Do you see the same kind of difference when benchmarking memory with nembench, or memspeed?

WITHOUT BLTFIX

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WITH BLTFIX

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Re: ST536 STE EDITION

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Hmmn, that looks like perhaps cache is not enabling?

It was years since I looked at blitfix but a quick glance at reveals it clears the instruction and data cache on installation. Is it per chance disabling the cache there? Though I'm pretty sure bit 3 and 11 are for clearing the instruction and data caches respectively.

https://github.com/agranlund/tftools/bl ... /blitfix.s
(if that is the version you are using)

Looking through the other bits of code I can't immediately see what else would cause this to happen, but the code is all kinds of horrible and I didn't want to stare at it for too long :)

Update: Could maybe be that TOS is not setting cache on/off per your menu setting (or rather, setting in newdesk.inf) when it starts because you have a blitter - implying that there's no need to run whatever cache init code it has because if you have a blitter then surely it's not a TT anyway.. or something..
It reuses the same menu option as either blitter or cache control for the same reason, there was never a need for both at the same time.

But even so, one would think memspeed etc explicitly enables caches for the L1 test and then disables them for the L2/nocache test.. because that's the only sane approach for a benchmark program, so I really don't know :)
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