exxos's DFB1 trials

[exxos]

The second error literally points to nothing :shrug:

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[Badwolf]

Another oddity in the DRC. This reminds me of the crazy stuff eagle does.

The red track is actually on the top layer, and the pads for the jumpers are on the bottom layer. There is nothing for it to be too close to :stars:

That red marker is not for the track (the track referenced is for a different signal and different jumper). You're too used to Eagle! ;)

That's the overlapping courtyard error (grey outlines).

BW

[sporniket]

locate the footprint of "J2", pad #4 ?

[Badwolf]

The second error literally points to nothing :shrug:

Is that the middle of U2 (the 030?)

It has no courtyard.

BW

[exxos]

That red marker is not for the track (the track referenced is for a different signal and different jumper). You're too used to Eagle! ;)

That's the overlapping courtyard error (grey outlines).

Yeah I gather the grey outlines of the courtyard overlapping and fixed that. But when I clicked on the DRC box, at least the first error, it took me to that overlap. Unless that is not how that works..

The actual track overlap is under one of the connectors on the right-hand side of the board. So I don't know why it took me to basically the wrong DRC error :shrug:

Yeah I like Eagle, I know what all the bugs are :lol:

[exxos]

Is that the middle of U2 (the 030?)

It has no courtyard.

Yeah that is the only error now, I presume we don't care about it ? :shrug:

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[Badwolf]

That red marker is not for the track (the track referenced is for a different signal and different jumper). You're too used to Eagle! ;)
That's the overlapping courtyard error (grey outlines).

Yeah I gather the grey outlines of the courtyard overlapping and fixed that. But when I clicked on the DRC box, at least the first error, it took me to that overlap. Unless that is not how that works..

The actual track overlap is under one of the connectors on the right-hand side of the board. So I don't know why it took me to basically the wrong DRC error :shrug:

Yeah I like Eagle, I know what all the bugs are :lol:

Once you've edited something, you need to delete all markers and run again. It probably took you to error[2], but error[2] is now what used to be error[3] (or something -- YKWIM).

And yeah, don't care about the 030 not having a courtyard. You could add one if you like. AFAIK they're purely there for DRC checking anyway.

I often stack components (eg, a DIP or SMD oscillator -- chose one) so tend to turn off overlapping (and missing) courtyard messages.

BW

[exxos]

Right, I think I am done messing with this PCB now :lol: I probably will be giving @Badwolf Palpitations if I do much more :lol: :hide:

The next daunting part is to start working on a proper BOM etc

DFB1X.PNG (292.76 KiB) Viewed 1130 times

[Badwolf]

Right, I think I am done messing with this PCB now :lol: I probably will be giving @Badwolf Palpitations if I do much more :lol: :hide:
The next daunting part is to start working on a proper BOM etc

Looks slick. :thumbup: Still keeping one DIP oscillator, are you? I thought when you said having two, you meant a 50 and a 40 SMD.

BW

[exxos]

Looks slick. :thumbup: Still keeping one DIP oscillator, are you? I thought when you said having two, you meant a 50 and a 40 SMD.

They are in the middle of the board (X1 & X3) they are the smaller type like the TF536 uses. There is a 50Mhz and 40MHz there. It is switchable by the jumper. It is just more 3D models stuff missing which is probably confusing things a little bit.

The larger oscillator is for the FPU as before. I haven't changed anything in that respect other than adding the optional switch for the clock buffer.

I'm hoping we can just chuck 50MHz out of the PLD to the FPU clock.. We have the option of 25MHz, or use the external FPU..

I guess really there should be a jumper to select the clock source for the FPU. but I think for the initial batch is probably not worth adding at this point. :shrug: