Flashy Clock - Yet another DEV board

[exxos]

I think it was @PaulJ who was doing software. Though I don't know where things got up to with it. Either way, the current design needs a huge rewrite in software as I totally changed how it all works now. I will post the basic source so anyone can port it when its finished.

[exxos]

Next (and hopefully final) bodge wire in place :)

b1.jpg

[exxos]

A crappy video showing the changing and rebooting of flash banks :)

The resetting is done in hardware. This was a bit tricky because I needed to issue the reset command before making the bank selection. Simply because, the reset cannot come afterwards because the machine will lock up when the bank is changed. So the reset command triggers a huge delay in the PLD which times out after some time.

The delay needed was a lot longer than I had originally thought as a while ago GLUE was timing out with bus error because of the delay length. I suppose this is the problem with using BASIC, as there is so much bus activity in between basically a couple lines of code its unreal. I ended up with a 8 / 32 clock divider which has about 8x 0.25Mhz clock delays. So like 1024 bus cycles I guess. Anyway, it doesn't really matter a works

:cheer: :cheer:





My camera ran out of storage space halfway through the demo, but you get the idea anyway :)

[Icky]

:bravo: - cool getting closer :) I just need to carry on with the V6 board.

[exxos]

cool getting closer :) I just need to carry on with the V6 board.

Yep :) I think basically the software and firmware is as dumb as it can be until the new board is done..

Saying that I still need to the alt-ram stuff yet.. But I don't think my boards are going to arrive anytime soon :roll:

[PhilC]

It still amazes me how much activity there is in the Atari and Amiga etc community when you consider how old these computers are.

[exxos]

It still amazes me how much activity there is in the Atari and Amiga etc community when you consider how old these computers are.

This is *real* computing , Where you have to design stuff and get the soldering iron out to upgrade things, none of this slotting cards in type nonsense that the wimps of today do to upgrade :)

[derkom]

none of this slotting cards in type nonsense that the wimps of today do to upgrade :)

An upgrade to most people today means buying a new device and tossing the old one in the bin, unfortunately.

[Icky]

V6 is slowly getting there. I have managed to get all the components on and routing is just now around the PLD with about three quarters of the PLD to finish fettling in.

Below is a render of the topside of the board from left to right is:

• PLD
• FlashROM - now one chip.
• Battery backup
  - if plugged into H4 this is the best option
  - if you want to use your own battery one can be plugged into the header on the left
• RTC

Screenshot 2019-12-28 at 22.32.39.png

Next a render of the underside of the board. This shows the SRAM chip and the 5V to 3.3V buffers.

Screenshot 2019-12-28 at 22.35.38.png

[exxos]

Compact board packed full of goodness :thumbup: