Looks like I'll be getting a Mega ST4 soon

[PhilC]

Same to you RJ, and good suggestion @exxos might do some bizarre stuff though, lol

[rubber_jonnie]

I'd say lift the halt pin up on the CPU and wire link it to reset pin on the cpu and see what happens.

:thanksyellow:

Hmm not so easy with the CPU soldered back in :o

Perhaps I could lift the HALT pin and set it high?

I'll continuity check CPU to GLUE first, then consider that.

I also need to see if HALT is shorted to GND somewhere, though at least it isn't shorted to any other pins on the CPU.

GLUE socket has been reflowed too, and I've tweaked the socket/cleaned the chip contacts.

[exxos]

Same to you RJ, and good suggestion @exxos might do some bizarre stuff though, lol

Nah :lol:

[exxos]

Perhaps I could lift the HALT pin and set it high?

I don't know if that would work, I think you have to switch both to reset the cpu properly, would be a matter of reading the blurb in the 68000 datasheet..

[PhilC]

Lift the /halt and connect it to /reset ibr ground that that does work when I had a reset issue but you do get some odd results. Still, it may then let you lift other chips and work out what is holding halt low?

[rubber_jonnie]

Didn't have a lot of time today as had other plans,that is I had to go to the range and zero in my new rifle scope :)

But I did manage to have a go with my LA, specifically looking at 8 MHz, 16Mhz and 32Mhz signals on a working machine. Very interesting experience, I'm going to have to play around a bit more on the running machine, but it looks like it will be amazing for troubleshooting.

Hope @exxos & @PhilC had a good New Years Day :)

[rubber_jonnie]

Just a quick post for interests sake more than anything, as I have some logic analyser screen grabs.

There are three traces:

1) Channel 0, Grey - /AS
2) Channel 1, Brown, RESET
3) Channel 7, Purple, HALT

The first pic shows a healthy Mega ST1 on reset:

Good.jpg

This next one shows the dead Mega ST4:

Bad.jpg

As you can see, /AS on the dead machine briefly pulses on reset and finishes high, and HALT briefly goes high then goes low again.

Looking at the schematic, although the RESET seems to work as intended (Goes low then high after a small wait), there is also has connection to the HALT line, so I am now back to thinking that maybe the reset circuit is the problem here. I will have a look at that, but I have to park this for a bit to make some progress on the H4, as I'm waaaaay behind.

As a side note, I found that A2 on the GLUE did not have continuity through to the CPU, which has now been fixed, though it didn't revive the machine. Also, I have to say that an LA is a fantastic tool for looking at his kind of thing. The traces above were way harder to see on an oscilloscope.

[exxos]

It may help if you look at BERR more than HALT. BERR is triggered by GLUE is there is a huge delay in some device in responding. What I assume is happening, is machine tries to read ROM and likely succeeds for a couple of bus cycles, and then maybe the address or data is wrong causing a invalid instruction or address which is not decoded which then causes glue to panic an issue BERR. DTACK I assume will remain HI during the point things goes wrong and then BERR gets issued (which also pulls HALT down)

[rubber_jonnie]

@exxos Cool, thanks. I did check BERR continuity, I will add checking it as you've described to the list of things to do.

[rubber_jonnie]

I checked BERR on a working machine at boot, and you can see it come high, then some pulses, and eventually simply settles down on high.

The Mega 4 just goes high, no pulses. I think something is holding the chip in an indeterminate state of HALT or RESET and it just never executes code. Got to cont check from the MMU to CPU I think, as I've not done so so far. As for the Blitter I can just take it out fo the moment, reduce what I'm looking at.

I'll fix this damn thing even if it takes me years!!