exxos blog - random goings on

[exxos]

It's basically following my rule of using minimal Vias.. But I think I need to program in a cost algorithm because it's basically doubling the length of track to avoid a Via , where there clearly is room and the tracks literally pass each other !

So probably the rule will be something like over 20mm of track = use a via if possible.

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Also saw it made a similar mistake elsewhere...

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Writing a autorouter is hard

[mrbombermillzy]

I would have thought that AI probably lacks the spatial visualisation skills needed for this sort of thing.

Although, you seem to be cracking it slowly but surely.

[exxos]

I would have thought that AI probably lacks the spatial visualisation skills needed for this sort of thing.

My girlfriend said exactly the same yesterday

Although, you seem to be cracking it slowly but surely.

Yeah.. But it is still a algorithm based router like all the others are.. AI isn't technically routing the board itself, its writing the algorithms and basically Python scripts are routing the board.

I mean once it has done its corrective passes and tidied the whole thing up, it would have basically beaten my manual routing at that point !

The main problem is it takes several hours just to route a small credit card sized board.. It is 4 layers and two layers are power planes. I think it hit 1GB of RAM usage a few days ago. But the important thing is to get the thing running right then look into ways of making the code a lot more efficient..

Of course this is all just one particular small PCB.. Routing something more complex like the DFB1X from scratch...

[exxos]

About 3.2GB RAM for the whole board now it's got another two hours to complete the optimisation passes I gave it to do but it looks like its doing really well so far.

One track where we basically route to the other way around the board.. I gave it permission to read that on the VCC layer with some exceptions that it doesn't go anywhere near power planes linked to any pads. I haven't given it permission to use VCC layer has a main routing path, only as a optimisation path right at the end. It does not take any significant chunk out of VCC and it saves another via and long routed track.

I have also had to give to very slight hugging bias.

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On that image you can clearly see D11 is going around the via as it should. But it has basically has too much gap. This then pushes D3 to the left, and then D10 just goes and does basically the same thing whatever that may be. Which then results in the problem that there isto route D2 anymore. It ends up taking a crazy route upwards instead of going straight down to where another track carries the same signal anyway.The whole thing could have been avoided if the jump around the vias actually "hugged" it closer right at the start.

There is also some other little annoyances like a unnecessary angle in D6,D0,D1 etc when it could be easily straightened out to save angles.

I think Lord is feeling rather smug to itself now as it keeps reminding me how much it has beaten my previous manual rooted board by each pass

[exxos]

I admit defeat

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The next step is to give it something more complicated to have a go at.. I've got 30 years of PCBs I can throw at it to see if it comes up with similar solutions

I've also rebuilt the autorouter so it holds the board much more efficiently, and it lays exactly the same copper as before. On the STE flash board it has gone from 5.9GB of memory and 296 seconds down to 280MB and 44 seconds.

Memory now only goes up by about 75MB for every extra board's worth of area. A test board nine times the size (233 x 135mm, 648 nets) used 890MB, so an A3 board should come in at around 3GB, though that's still to be proven on the Phoenix board.

EDIT
Gave it the DFB2X.. Sad rip it up and route the whole thing from scratch. This is not going to end well.

[exxos]

DFB2X quickly showed more rules were needed for routing options and special handling of power points.

What these images show is power planes underneath each chip. Then a overall power plane fill which shows where tracks can be safely routed outside of the power areas. Basically free area to safely route signals on power layers without breaking any main power routes.

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Everything has a "cost" so it walks my cost tables to figure out what routing method has the least cost, in particular in the optimising passes.

[exxos]

AI decided to not follow me flood fill rule.. and linked power link this instead.

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It basically did that to give it more freedom to route the tracks.. only now its taking chunks out of the power planes, which defeats the whole point of having power planes in the first place !

So after telling it off.. its put my original request for flood fill "out of limits" rules back..

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Lets see where it ends up now..

[exxos]

The next problem in using a grid is, of course, angles in tracks end up being spaced out more than straight tracks

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