New accelerator for a Amiga, Atari and others

[utri007]

Mike Stirling has manged to make really nice tiny accelerator, wich has 68040 level performance. Wich means about 4x w per mhz when compared to 68030.

It is drop in replacement for a 68000 cpu

mike_stirling_accelerator.png

[Umberto1st]

Link?

[chue]

Found this blog post from March, which may or may not be up to date:

https://www.mike-stirling.com/2020/03/a ... m-sd-card/

[Atarian Computing]

https://eab.abime.net/showthread.php?t=100729&page=21

[terriblefire]

This is a great project. Unfortunately it will still have the issue in the CDTV with the DMA as the 68000 socket doesnt have 32 bits of address bus.

This is because as said before the CDTV issue is a software problem.

[amimjf]

Looks super, for me it provides a middle ground between TF/MK cards that use real Motorola CPUs but you have to deal with all the eBay scams and the unobtainium of Warp/Vampire cards.

Hope he can bring it to market.

[utri007]

It just got status update

Just picking up on some of the questions above:

- SDIO IDE performance will not improve much as Gayle emulation because the bottleneck is the motherboard bus (not that I can remember where we were with numbers, but there isn't really anything to optimise there). Where it could be improved is with the addition of a DMA-capable mode (with driver obviously). This won't be there on launch but my intention is that it will be possible to update the FPGA bitstream without any special tools.
- Level shifters are underneath. There is no skimping on the design. It's an 8-layer board with double-sided SMT.
- The serial bus is underneath on an FFC connector. It is differential and has three data pairs and one clock pair. It's mainly for my own dev use but you never know.
- Release date - realistically I think January. There is a slim chance it could be ready before but I still have some more work to do on the logic and I'm pretty busy right now. There are also supply-chain problems in the industry at the moment with long lead times on a lot of components and the stocking disties out of stock of many parts. I haven't checked if anything on this is affected yet.
- Pricing - waiting on quotes from the assembly house. Will update soon. I do need to try to get a handle on levels of interest so once I have prices I will set up some sort of registration page.

Regarding open-source: As I've said before it will not be fully open source at least from day one because of the significant NRE cost that needs to be recouped. I would expect to release a subset of the HDL at some point, and possibly all of it eventually. Clearly this board would make a nice general purpose, 5V tolerant, breadboardable FPGA dev board so if there is interest for "alternative uses" that can be factored in to my volume estimates then please let me know.

Mike

[exxos]

If this is based on the TG68 core.. That won't work on Atari.. So I doubt this one will either. Looks like a Amiga booster not Atari ?

[Steve]

If this is based on the TG68 core.. That won't work on Atari.. So I doubt this one will either. Looks like a Amiga booster not Atari ?

Since it is FPGA then perhaps there could be an alternative core for the ST. This might be something the guys at 'Lightning ST' are interested in, they might be able to integrate it as a double stack. @tuxie

[amimjf]

If this is based on the TG68 core.. That won't work on Atari.. So I doubt this one will either. Looks like a Amiga booster not Atari ?

Why would TG68 be platform specific ?,.. I don't know the answer, but surely it's going to be a minor implementation detail rather than a design issue. We did embedded boards back in the day based on 68000 and 68332 and I don't remember having problems with shared memory peripherals.

Happy for technical answers.