Been giving thought to storing booster options when the machine is first powered up and down..
I was thinking of using a small EEPROM to store the booster settings, but this seems to be a total waste of a IC.
As there is actually flash on the board anyway, I was thinking about using the very last eight bits in the flash memory for the storage register. Of course this means the last eight bits in the last ROM bank would not be able to be used by the ROM, should not really be a problem as long as the checksum data is not there or something..
In any case, the address bus on power up will all be 1's, due to the pullups on the CPU. I can use that to select the upper ROM bank in the flash on power up. The PLD I can set the ROM bank select bits to 11 to also select the upper ROM bank and enable the flash to output data onto the databus.
At this point the machine is still in reset and nothing yet has happened. Other than data is now actually on the bus. When the reset signal changes I can use that signal to latch the data on the bus inside the PLD which in turn loads control bits of the booster functions. At the same time the reset signal will be used to disable the flash bank, the databus will be pulled high, and the machine will now start the power up sequence as normal.
The only problem here, is that I do not think just 8 bits can be programmed with a EEPROM.. I need to look into this a bit more as I have never used flash or EEPROM before....
EDIT:
ok both eeprom and flash can't really do a single byte update
Byte-Program Operation
The SST39SF010A/020A/040 are programmed on a byte-by-byte basis. Before programming, the sector
where the byte exists must be fully erased.
Sector-Erase Operation
The Sector-Erase operation allows the system to erase the device on a sector-by-sector basis. The
sector architecture is based on uniform sector size of 4 KByte. The
So looks like I will have to go for a separate IC or sacrifice a ROM bank... I guess even 3 out of 4 ROM's is still good really though..
That sounds interesting!
