DFB1X any use for a expansion port ?

[exxos]

I remember having left-right signal lines packed in as tightly as possible on both signal layers north of the top adapter to fit the footprint. I held my nose and did it.

EDIT: ah, no, I did manage to keep them *mostly* one layer, so there is actually more theoretical room than I remembered. Those vias on the address lines, though...

Yeah I edited a lot of those routes on the DFB1X, then after a while gave up

I'm toying with it now. Can make use of internal layers towards the edge and shift everything up.. sounds simple in my head anyway..

[exxos]

Looks like I did more than I remember its make my eyes go funny.. probably why I abandoned it last time

Capture.PNG (292.25 KiB) Viewed 55 times

EDIT:

Looks like 2 tracks not happy with, and also looks like i wasn't sure what to do about those BGIO lines either.

[Badwolf]

Looks like I did more than I remember its make my eyes go funny.. probably why I abandoned it last time
Capture.PNG

Good effort, that.

Looks like 2 tracks not happy with, and also looks like i wasn't sure what to do about those BGIO lines either.

Is this the CPUBGI and CPUBGO lines on the bottom connector? The best compatiblity option is to leave them open and require the user to jumper them (like Atari did). It wouldn't solve the problem of other cards using the XBG line instead, but would in theory leave the door open to expansions that use the CPUBGI method of bus mastery.

BW

[exxos]

Good effort, that.

I see I routed 2 tracks on GND layer across the board. Probably couldn't find a better route at the time, WIP basically.

Is this the CPUBGI and CPUBGO lines on the bottom connector?

Yep.

The best compatibility option is to leave them open and require the user to jumper them (like Atari did). It wouldn't solve the problem of other cards using the XBG line instead, but would in theory leave the door open to expansions that use the CPUBGI method of bus mastery.

Yeah, currently you had a shorted jumper connecting them. But with a second set .. im not sure about.

[Badwolf]

Yeah, currently you had a shorted jumper connecting them. But with a second set .. im not sure about.

There exists a further option which I pondered for a while but rejected on the grounds of firmware backward compatibility and the fact that any other card on top might break it:

DFB1 could be modified to use CPUBGI/BGO and therefore leave XBR free for other expansion cards.

In theory this would allow stacking FalconSpeed, for example. But would either need the CPUBGO/BGI trace cut on the top board, or perhaps simpler, not populating those pins on the passthrough board.

Of course, what if you then found a board that used CPUBGI/O..? well the circle starts again.

Atari clearly never planned there to be two non-coperating expansions on the port

BW

[exxos]

Of course, what if you then found a board that used CPUBGI/O..? well the circle starts again.
Atari clearly never planned there to be two non-coperating expansions on the port

Yeah, it's hard to know what to do for the best, its like designing a feature for a setup which hasn't been designed yet

Will add jumpers or tracks which can be easily cut, then covers it all then

[viking272]

Thanks both for your analysis on a complex design change!
Much appreciated

[Badwolf]

Will add jumpers or tracks which can be easily cut, then covers it all then

Probably the least intrusive change would be to leave the cuttable pad for BGI/BGO and route the XBR-out pin to the CPLD, completely isolated from the XBR-in.

That way you could do something like

Code: Select all

assign XBR_OUT = BR_internal ? XBR : 1'b1;

ie. we've made a new even lower priority link on the bus grant chain.

But I wouldn't even consider it until you're down to the last two DFB1X in stock

BW

[exxos]

Probably the least intrusive change would be to leave the cuttable pad for BGI/BGO and route the XBR-out pin to the CPLD, completely isolated from the XBR-in.

That way you could do something like

Code: Select all

assign XBR_OUT = BR_internal ? XBR : 1'b1;

ie. we've made a new even lower priority link on the bus grant chain.

Yeah good idea.

But I wouldn't even consider it until you're down to the last two DFB1X in stock

Yeah that could be "a while". But someone has to design something to plug into the thing first anyway

[Badwolf]

On the subject of expansions, BTW, I had toyed with the idea of a solder-on board using complicated fingers to reach between pin rows and castellated holes to fit on the bottom side of the board beneath the 030 socket.

It'd expose some flatflex connectors for $FUTURE_BOARDS [mainly my long standing pipe dream of parallel fast ST-RAM access].

This would have the advantage of being fully 32 bit albeit with the same restriction of being bus-slave only.

I engage in lots of daydreaming

BW