Can all registered uses please login, even just for a few minutes..
It helps build a picture where our "good traffic" is coming from..
Thanks :)
It helps build a picture where our "good traffic" is coming from..
Thanks :)
Slow DSP investigation with DFB1
Re: Slow DSP investigation with DFB1
I've established a baseline first.
GB6 was calibrated first of all. Then a second run.
Then with DFB1X plugged in , jumper set to DISABLED.
So as GB6 depends on timer ticks, 1-2% variation is easily normal anyway.
GB6 was calibrated first of all. Then a second run.
Then with DFB1X plugged in , jumper set to DISABLED.
So as GB6 depends on timer ticks, 1-2% variation is easily normal anyway.
Re: Slow DSP investigation with DFB1
DSPBENCH & NEMBENCH
STOCK
DISABLED
(forgot to copy the NEMBENCH results, but assume the same as above)
ENABLED
OPTION 2 JUMPERED
STOCK
Code: Select all
DSPBench v3.0b - precision DSP tests. dml/2026
memory integrity test:
DSP-local IX:IY $0000-$01FF march OK
SRAM EX:EY $0200-$3FFF march OK
HOST interrupt test:
RXDF/CPU interrupts triggered OK
TXDF/CPU interrupts triggered OK
hostport raw R/W datarate:
write ( 24bit x:H:M:L ) -> 3.603 MB/sec (~100%)
read ( 24bit x:H:M:L ) -> 3.049 MB/sec (~100%)
write ( 16bit -:-:M:L ) -> 4.410 MB/sec (~100%)
read ( 16bit -:-:M:L ) -> 3.326 MB/sec (~100%)
host transfer rate (STRam)
TX ( 24b/packed ) -> 2.441 MB/sec (~100%)
TX ( 24b/longs ) -> 2.107 MB/sec (~100%)
RX ( 24b/longs ) -> 2.198 MB/sec (~100%)
TX ( 16b/words ) -> 2.343 MB/sec (~100%)
RX ( 16b/words ) -> 2.758 MB/sec (~100%)
TX ( 8b/bytes ) -> 1.761 MB/sec (~100%)
RX ( 8b/bytes ) -> 1.845 MB/sec (~100%)
ALU & SRAM speed:
mac ( P:Int X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Int X:Ext Y:Ext ) -> 8.000 Mips (~100%)
mac ( P:Ext X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Ext X:Ext Y:Ext ) -> 5.333 Mips (~100%)
Code: Select all
NemBench v2.2 - precision CPU/FPU profiler.
Integer multiply (16bit) -> 0.616 Mips (~100%)
Integer divide (16bit) -> 0.363 Mips (~100%)
Linear (stalled) integer -> 7.992 Mips (~100%)
Interleaved (piped) integer -> 8.000 Mips (~100%)
16bit read (100% cached) -> 7.898 MByte/sec (~100%)
16bit write (100% cached) -> 6.075 MByte/sec (~100%)
16bit copy (100% cached) -> 5.096 MByte/sec (~84%)
32bit read (100% cached) -> 15.785 MByte/sec (~100%)
32bit write (100% cached) -> 6.720 MByte/sec (~100%)
32bit copy (100% cached) -> 6.693 MByte/sec (~100%)
Linear 32bit read (ST-Ram) -> 5.349 MByte/sec (~100%)
Linear 32bit write (ST-Ram) -> 6.508 MByte/sec (~100%)
Linear 32bit copy (ST-Ram) -> 3.260 MByte/sec (~101%)
Linear 16bit read (ST-Ram) -> 4.563 MByte/sec (~85%)
Linear 16bit write (ST-Ram) -> 5.872 MByte/sec (~91%)
Linear 16bit copy (ST-Ram) -> 2.097 MByte/sec (~64%)
Linear 8bit read (ST-Ram) -> 2.854 MByte/sec (~53%)
Linear 8bit write (ST-Ram) -> 2.936 MByte/sec (~45%)
Linear 8bit copy (ST-Ram) -> 1.047 MByte/sec (~32%)
DISABLED
Code: Select all
DSPBench v3.0b - precision DSP tests. dml/2026
memory integrity test:
DSP-local IX:IY $0000-$01FF march OK
SRAM EX:EY $0200-$3FFF march OK
HOST interrupt test:
RXDF/CPU interrupts triggered OK
TXDF/CPU interrupts triggered OK
hostport raw R/W datarate:
write ( 24bit x:H:M:L ) -> 3.603 MB/sec (~100%)
read ( 24bit x:H:M:L ) -> 3.049 MB/sec (~100%)
write ( 16bit -:-:M:L ) -> 4.404 MB/sec (~100%)
read ( 16bit -:-:M:L ) -> 3.326 MB/sec (~100%)
host transfer rate (STRam)
TX ( 24b/packed ) -> 2.441 MB/sec (~100%)
TX ( 24b/longs ) -> 2.107 MB/sec (~100%)
RX ( 24b/longs ) -> 2.198 MB/sec (~100%)
TX ( 16b/words ) -> 2.343 MB/sec (~100%)
RX ( 16b/words ) -> 2.758 MB/sec (~100%)
TX ( 8b/bytes ) -> 1.763 MB/sec (~100%)
RX ( 8b/bytes ) -> 1.845 MB/sec (~100%)
ALU & SRAM speed:
mac ( P:Int X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Int X:Ext Y:Ext ) -> 8.000 Mips (~100%)
mac ( P:Ext X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Ext X:Ext Y:Ext ) -> 5.333 Mips (~100%)
ENABLED
Code: Select all
DSPBench v3.0b - precision DSP tests. dml/2026
memory integrity test:
DSP-local IX:IY $0000-$01FF march OK
SRAM EX:EY $0200-$3FFF march OK
HOST interrupt test:
RXDF/CPU interrupts triggered OK
TXDF/CPU interrupts triggered OK
hostport raw R/W datarate:
write ( 24bit x:H:M:L ) -> 1.955 MB/sec (~54%)
read ( 24bit x:H:M:L ) -> 1.795 MB/sec (~59%)
write ( 16bit -:-:M:L ) -> 2.598 MB/sec (~59%)
read ( 16bit -:-:M:L ) -> 2.212 MB/sec (~66%)
host transfer rate (STRam)
TX ( 24b/packed ) -> 1.549 MB/sec (~63%)
TX ( 24b/longs ) -> 1.412 MB/sec (~67%)
RX ( 24b/longs ) -> 1.410 MB/sec (~64%)
TX ( 16b/words ) -> 1.780 MB/sec (~76%)
RX ( 16b/words ) -> 1.790 MB/sec (~65%)
TX ( 8b/bytes ) -> 1.575 MB/sec (~90%)
RX ( 8b/bytes ) -> 1.383 MB/sec (~75%)
ALU & SRAM speed:
mac ( P:Int X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Int X:Ext Y:Ext ) -> 8.000 Mips (~100%)
mac ( P:Ext X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Ext X:Ext Y:Ext ) -> 5.333 Mips (~100%)
Code: Select all
NemBench v2.2 - precision CPU/FPU profiler.
Integer multiply (16bit) -> 0.616 Mips (~100%)
Integer divide (16bit) -> 0.363 Mips (~100%)
Linear (stalled) integer -> 7.992 Mips (~100%)
Interleaved (piped) integer -> 7.992 Mips (~100%)
16bit read (100% cached) -> 7.898 MByte/sec (~100%)
16bit write (100% cached) -> 6.082 MByte/sec (~101%)
16bit copy (100% cached) -> 5.102 MByte/sec (~84%)
32bit read (100% cached) -> 15.785 MByte/sec (~100%)
32bit write (100% cached) -> 6.729 MByte/sec (~100%)
32bit copy (100% cached) -> 6.693 MByte/sec (~100%)
Linear 32bit read (ST-Ram) -> 5.358 MByte/sec (~100%)
Linear 32bit write (ST-Ram) -> 6.508 MByte/sec (~100%)
Linear 32bit copy (ST-Ram) -> 3.263 MByte/sec (~101%)
Linear 16bit read (ST-Ram) -> 4.570 MByte/sec (~85%)
Linear 16bit write (ST-Ram) -> 5.872 MByte/sec (~91%)
Linear 16bit copy (ST-Ram) -> 2.097 MByte/sec (~64%)
Linear 8bit read (ST-Ram) -> 2.879 MByte/sec (~54%)
Linear 8bit write (ST-Ram) -> 2.941 MByte/sec (~45%)
Linear 8bit copy (ST-Ram) -> 1.047 MByte/sec (~32%)
OPTION 2 JUMPERED
Code: Select all
DSPBench v3.0b - precision DSP tests. dml/2026
memory integrity test:
DSP-local IX:IY $0000-$01FF march OK
SRAM EX:EY $0200-$3FFF march OK
HOST interrupt test:
RXDF/CPU interrupts triggered OK
TXDF/CPU interrupts triggered OK
hostport raw R/W datarate:
write ( 24bit x:H:M:L ) -> 1.955 MB/sec (~54%)
read ( 24bit x:H:M:L ) -> 1.777 MB/sec (~58%)
write ( 16bit -:-:M:L ) -> 2.598 MB/sec (~59%)
read ( 16bit -:-:M:L ) -> 2.171 MB/sec (~65%)
host transfer rate (STRam)
TX ( 24b/packed ) -> 1.549 MB/sec (~63%)
TX ( 24b/longs ) -> 1.410 MB/sec (~67%)
RX ( 24b/longs ) -> 1.410 MB/sec (~64%)
TX ( 16b/words ) -> 1.735 MB/sec (~74%)
RX ( 16b/words ) -> 1.790 MB/sec (~65%)
TX ( 8b/bytes ) -> 1.460 MB/sec (~83%)
RX ( 8b/bytes ) -> 1.383 MB/sec (~75%)
ALU & SRAM speed:
mac ( P:Int X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Int X:Ext Y:Ext ) -> 8.000 Mips (~100%)
mac ( P:Ext X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Ext X:Ext Y:Ext ) -> 5.333 Mips (~100%)
Re: Slow DSP investigation with DFB1
New firmware and new U68 U68turbo.jed.
Feed it all into AI for the round up. Someone else can check it 
Code: Select all
DSPBench v3.0b - precision DSP tests. dml/2026
memory integrity test:
DSP-local IX:IY $0000-$01FF march OK
SRAM EX:EY $0200-$3FFF march OK
HOST interrupt test:
RXDF/CPU interrupts triggered OK
TXDF/CPU interrupts triggered OK
hostport raw R/W datarate:
write ( 24bit x:H:M:L ) -> 3.603 MB/sec (~100%)
read ( 24bit x:H:M:L ) -> 3.015 MB/sec (~99%)
write ( 16bit -:-:M:L ) -> 4.380 MB/sec (~99%)
read ( 16bit -:-:M:L ) -> 3.330 MB/sec (~100%)
host transfer rate (STRam)
TX ( 24b/packed ) -> 2.441 MB/sec (~100%)
TX ( 24b/longs ) -> 2.107 MB/sec (~100%)
RX ( 24b/longs ) -> 2.198 MB/sec (~100%)
TX ( 16b/words ) -> 2.360 MB/sec (~100%)
RX ( 16b/words ) -> 2.767 MB/sec (~101%)
TX ( 8b/bytes ) -> 1.792 MB/sec (~102%)
RX ( 8b/bytes ) -> 1.872 MB/sec (~101%)
ALU & SRAM speed:
mac ( P:Int X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Int X:Ext Y:Ext ) -> 8.000 Mips (~100%)
mac ( P:Ext X:Int Y:Int ) -> 16.000 Mips (~100%)
mac ( P:Ext X:Ext Y:Ext ) -> 5.333 Mips (~100%)
Code: Select all
NemBench v2.2 - precision CPU/FPU profiler.
Integer multiply (16bit) -> 1.921 Mips (~313%)
Integer divide (16bit) -> 1.135 Mips (~313%)
Linear (stalled) integer -> 24.899 Mips (~312%)
Interleaved (piped) integer -> 24.899 Mips (~312%)
Float multiply (64bit) -> 0.839 MegaFlops (~316%)
Float divide (64bit) -> 0.543 MegaFlops (~313%)
Linear (stalled) float -> 1.625 MegaFlops (~304%)
Interleaved (piped) float -> 1.742 MegaFlops (~327%)
16bit read (100% cached) -> 24.600 MByte/sec (~313%)
16bit write (100% cached) -> 6.060 MByte/sec (~100%)
16bit copy (100% cached) -> 4.995 MByte/sec (~83%)
32bit read (100% cached) -> 49.140 MByte/sec (~313%)
32bit write (100% cached) -> 6.711 MByte/sec (~100%)
32bit copy (100% cached) -> 6.702 MByte/sec (~100%)
Linear 32bit read (ST-Ram) -> 5.371 MByte/sec (~101%)
Linear 32bit write (ST-Ram) -> 6.495 MByte/sec (~100%)
Linear 32bit copy (ST-Ram) -> 3.257 MByte/sec (~100%)
Linear 16bit read (ST-Ram) -> 5.064 MByte/sec (~95%)
Linear 16bit write (ST-Ram) -> 5.851 MByte/sec (~90%)
Linear 16bit copy (ST-Ram) -> 2.095 MByte/sec (~64%)
Linear 8bit read (ST-Ram) -> 4.233 MByte/sec (~79%)
Linear 8bit write (ST-Ram) -> 2.925 MByte/sec (~45%)
Linear 8bit copy (ST-Ram) -> 1.044 MByte/sec (~32%)
Re: Slow DSP investigation with DFB1
ACE TRACKER running.
CUBASE loads, but won't play anything unless I connect up my SCSI drive, and can't be bothered tonight
CUBASE loads, but won't play anything unless I connect up my SCSI drive, and can't be bothered tonight
- viking272
- Site sponsor

- Posts: 302
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- Location: Reading, Berkshire, UK
Re: Slow DSP investigation with DFB1
Wow, that's a great result, all looks really positive.
Is this the work of Pakman, BW and yourself? Thanks to you all!
Re: Slow DSP investigation with DFB1
Its @Badwolf and @Pacman work. I only tested it.viking272 wrote: Wed Oct 28, 2026 10:30 pm Wow, that's a great result, all looks really positive.
Is this the work of Pakman, BW and yourself? Thanks to you all!![]()
Re: Slow DSP investigation with DFB1
Cool! I wonder why you don't have the black screen of doom I get on Acetracker when switching resolutions?
The GAL is Holger's work (@pakman). Chapeau.
BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
Re: Slow DSP investigation with DFB1
Don't think heard of that one.. Never had any troubles really.Badwolf wrote: Wed Oct 28, 2026 10:40 pm Cool! I wonder why you don't have the black screen of doom I get on Acetracker when switching resolutions?
I'd presume the new U68 would fix the DSP issue on the CT60 as well..?
- viking272
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- Joined: Mon Aug 10, 2020 11:32 am
- Location: Reading, Berkshire, UK
Re: Slow DSP investigation with DFB1
So is the original U68 on the Falcon at fault then? Can it be re-programmed easily or does it need to be replaced?exxos wrote: Wed Oct 28, 2026 10:45 pm I'd presume the new U68 would fix the DSP issue on the CT60 as well..?
Re: Slow DSP investigation with DFB1
Yes..viking272 wrote: Thu Oct 29, 2026 12:05 am So is the original U68 on the Falcon at fault then? Can it be re-programmed easily or does it need to be replaced?
When any booster (or DMA master) owns the bus, Atari’s U68 GAL waits two bus clocks after AS before selecting the DSP, against one for the Falcon’s own CPU, roughly halving host port speed. U68turbo selects the DSP immediately when the booster is master, and the 1.06 firmware ends DSP cycles itself one bus clock after XAS instead of waiting for the Falcon’s late DTACK
I reprogrammed the chip in my falcon.. Mostly out of desperation as I couldn't find any other chips anywhere when I've got a tube somewhere
