Yes, 50MHz system clock + DSP/25Mhz BUS.
The machine boots with 25MHz BUS enabled, but sooner or later it freezes completely including mouse cursor. I want to try adjusting the crossdomain synchronization code. Also, Claude AI said the current code can result in hazards even at 16Mhz.
Can all registered uses please login, even just for a few minutes..
It helps build a picture where our "good traffic" is coming from..
Thanks :)
It helps build a picture where our "good traffic" is coming from..
Thanks :)
DFB1X with Nemesis / clockpatch
Re: DFB1X with Nemesis / clockpatch
Have you had a logic analyser on all this? A stock Falcon may tolerate overclocking the bus to 25MHz, but the DFB1/X adds PLD delays to the mix, probably around 10ns. That sits on top of timing that is already being pushed.
Was nemesis a solid bus boost or did that do clock switching itself between 16mhz and 25Mhz?
Before rewriting the clock domain crossing, try it with acceleration disabled via the jumper. If it still freezes at 25MHz bus, the mux isn’t switching at all, so the clock switching code can’t be the culprit. The “hazard at 16MHz” is a known trade-off BW made on purpose for switching speed, and if it was the cause it would be falling over at 16MHz too.
dml’s result of solid at 20MHz and flaky at 24MHz once it warmed up smells far more like timing margin than logic. A scope on the clock input to the booster and an LA on XAS/DSACK against the bus clock would tell us more than any amount of code reading.
Was nemesis a solid bus boost or did that do clock switching itself between 16mhz and 25Mhz?
Before rewriting the clock domain crossing, try it with acceleration disabled via the jumper. If it still freezes at 25MHz bus, the mux isn’t switching at all, so the clock switching code can’t be the culprit. The “hazard at 16MHz” is a known trade-off BW made on purpose for switching speed, and if it was the cause it would be falling over at 16MHz too.
dml’s result of solid at 20MHz and flaky at 24MHz once it warmed up smells far more like timing margin than logic. A scope on the clock input to the booster and an LA on XAS/DSACK against the bus clock would tell us more than any amount of code reading.
