exxos's Atari, Amiga & retro forum

Steve wrote: 27 Aug 2026 12:10

rubber_jonnie wrote: 27 Aug 2026 11:58 So is it possible to stack the boards one on top of the other to improve density?
If not then why have the sockets at all?

As far as I know, the cannot stack TRAMS. I *think* the sockets are so you can probe signals easily.

I kind of thought that would be the case, especially since the components are too tall to allow stacking, but wouldn't it be cool if you could :)

I did see a post somewhere on an old Transputer discussion forum where they were actively talking about 'stacking Trams'. I don't know if I bookmarked it... will look later.

Anyway it seems unlikely because the serial links are just an RX/TX pair and if you stack them together the Transputers won't know which message is intended for which unit. Even if you had the software sort that out with a complicated multicast protocol, the link controller would lose packets on colliding signals.

But maybe someone thought of all that :)


I'll follow up soon with more progress on this thing...

alexh wrote: 27 Aug 2026 11:51 Great find. Several employees here are former inmos engineers who say they have old boards in their attics and I've been begging them to bring them in / loan or sell them to me. So far just a few pictures no hands on

So cruel of them :) I hope they change their ways and drop you some boards.

The next incremental step towards desk-flames was to plug the thing into a VME backplane - one that is not designed for it at all - and see if I could find any compatibility problems with pinouts/conflicts. Especially the power hookups.

I beeped out various points and confirmed 5V/GND where it should be expected and nowhere it wasn't expected. I wasn't really exhaustive with that but it was 'good enough' for the next step.

I obviously removed all the TRAMs before taking things further in case of accidents. They were bolted down with extremely annoying nylon bolts with some 1980s version of nail-varnish-threadlock stuff. I got most of them off by applying IPA and cracking the varnish with pliers before attempting to remove them. A few 'died' in the process when I ran out of patience.



I powered the backplane from a 5V bench supply. The backplane has nice chunky power terminals with big bolts. That might come in handy later.



...especially since the backplane alone sucks more than an Amp just for termination. :shock:



Anyway nothing blew up yet and I could see power at the correct points on the ICs etc. Good for the next step....

The next small step in the adventure - confirm the local 5MHz oscillator is appearing on the clock pin of all 8 TRAM slots.


...which it is!



Everything gets more difficult from this point onwards :)

Good work so far, looking like a real interesting project so far.

rubber_jonnie wrote: 28 Aug 2026 08:50 Good work so far, looking like a real interesting project so far.

Thanks!

I have a bit more detail to follow sometime today or tomorrow - after which we'll be fully caught up with my progress trying to reverse it.

You do realise that the "narrow" VME bus in the TT is compatible with the "wide" one on that backplane don't you?

"Wide" cards can usually run in "narrow" mode.

Of course, the TT doesn't support VME bus mastering, which may be an issue if trying to interface with that card.

stephen_usher wrote: 28 Aug 2026 10:39 You do realise that the "narrow" VME bus in the TT is compatible with the "wide" one on that backplane don't you?
"Wide" cards can usually run in "narrow" mode.
Of course, the TT doesn't support VME bus mastering, which may be an issue if trying to interface with that card.

I suspected as much but wasn't sure if it fully compatible. I will post a bit more on the connector soon.

However given the nature of Transputers and the limited signals required - and some other details I haven't revealed yet - it seemed like this would be a less fiddly approach to waking it up, at least for now...

Next update in my journey towards a desk-mounted-smoke-generator...

There are a bunch of mysterious things on the board (some more mysterious than others) which need de-confused before I can put this near my Atari.


The PAL chip was the most concerning part because if I do something wrong and blow it up, I can't replace it. It might also be a show-stopper for using the board at all, without cutting lots of traces and using it as a convenient peg-board instead of its intended topology with the VME connections etc.


There are also 3 ICs marked DM1/DM2/DM3 which have the part number SN74S1057SC.


Searching for this produced results ranging from 'vague' to 'not even close, thanks'. I managed to trace out what these are connected to but results did not make much obvious sense. It was wired as if operating as a buffer for inputs but seemed to be exposing both buffered and unbuffered versions of the same signals on the external connector.

Will come back to this one later.


There are three 74BCT244 buffers on the board tied to a bank of resistors. With some DMM probing I mapped some of these to the external VME P2 connector and to links on the TRAM slots so those are there to buffer link signals on the bus.


Given the total number of connections on the board I did not probe everything exhaustively but took samples from various places to try to build up a pattern of which things were handling which signals and especially numbering patterns that could allow me to predict the un-probed ones.

I started the process using a wire-wool cleaning sponge as the 'search' probe with the other probe either at GND, VCC or some point of interest. This narrowed things down quickly. I could change the sponge to a 1cm metal brush to sweep pin rows more easily and find where on the row the signal was.


There are several jumpers on the board, all clearly marked. The meaning of some could be (partly) figured out directly from the markings, some pretty vague and I had to guess and probe around a bit.


JP3-JP8 are adjacent to some of the TRAMs and the markings (Lxy) seem to point at making/breaking links between them or exposing them to the VME - which would make sense.

JP9 is ore of a 'global settings' switch to set serial link speed for some links and may configure the board in a master/slave config from the VME perspective.

Next update will show what I found from the probing, what those DM1/2/3 chips are, what the PAL is actually doing and begin to build up a topology....