exxos's Atari, Amiga & retro forum

matt020 wrote: 13 Sep 2021 13:59 Ok, and conversely, if the TF is in the Amiga, and the Amiga is powered on, the 3.3v line can be left out and not connected?

Yes bud

Confirming that I was unable to flash my TF1260 with the beta firmware using a first gen Raspberry Pi Model B (unable to detect the JTAG chain).

It worked flawlessly using a Raspberry Pi 3B+ which I ordered from Amazon.

Its highly likely that you had the B wired wrong. Almost every single revision of the Pi has different hat pinouts and this is why i dont show a guide on how to do this. Because it requires somone to take their time and match up their Pi with the correct pinout. It would be incredibly easy to blow up a Pi or a TF1260 by not paying attention.

I verified 3v3, ground, GPIO4, GPIO17, GPIO27, GPIO22. All the same between the original Pi B and the Pi 3B+.

I’m not infallible, of course; but I moved my loom over, and the SD card (supaduper’s image) and the JTAG chain was detected easily on the Pi 3B+. As far as I’m aware, all 40-pin header Raspberry Pi devices should be consistent.

Hello everyone
First post here!

I've a TF1260 ready to flash with the beta firmware using a RPi 3 model B.
I'm following this guide: https://linuxjedi.co.uk/2020/12/01/prog ... qq-tG6PHLE

I can see the CPLD chain, but I'm not sure to which CPLD should I flash the "bus" and the "ram" images respectively.
Spoke with Alen, who built my TF1260. He indicated the first CPLD is the "ram" and the second one is the "bus" and that my TF1260 does not have the 6ms RAM. He also said never flashed the CPLDs using a RPi. So, I just wanted to confirm that these are the commands I should issue to upgrade my TF1260:
xc3sprog -c matrix_creator -v -p 0 tf1260r1_ram_top.jed
xc3sprog -c matrix_creator -v -p 1 tf1260r1_bus_top.jed

Please let me know.
Thank you!

yep you're good to go with those

Thanks supaduper!

I was able to program my TF1260, took a few tries but it seems it's working now.
I'm getting 6.5MB/sec from the ehide.device using the latest driver and 1.6MB/sec from the IDE port on the A1200 motherboard.

For reference, I saw these kind of messages a few times, but it seems the CPLDs got programmed just by retrying the operation:

Thanks all!

I was able to flash using RPi, but not without hassle.

So I set up the RPi as per one of the earlier mentioned links. Checked the connection by running xc3sprog - j, all fine. Then dumped the existing firmware to files, all fine. At this point I did not consider that anything could go wrong afterwards. In hindsight I should have run multiple connection tests. But anyway, I didn't and started the flash procedure only to get failed verifications all the time (fuse mismatch at random numbers). . I then made shorter cables and got less errors when running xc3sprog with -t option to test connection, but still not zero. I did manage to get both CPLD's flashed and verified succesfully after a couple more attempts.

Long story short: run the connection test (-t option) before flashing. If that fails, first fix that before proceeding.

Good point.
Thanks for sharing!