REV 5 BOM and Build/Install procedure
Posted: 24 Mar 2022 00:07
Hi all, first, please, please forgive my ignorance here. I know the TF project has being going on for some time and stuff is constantly changing. I've read The LaST Upgrade Part 39 and several threads and I'm just not 100% clear on some things.
My goal is to install this board in to an Atari 520 STFM.
Here's what I've gathered so far:
STF536 Rev 5 : https://www.exxosforum.co.uk/atari/store2/#0220
PGA Socket : https://www.exxosforum.co.uk/atari/store2/#0181
IC3 : XC95144XL-5TQG144C Xilinx CPLD : https://www.mouser.com/ProductDetail/xi ... cycode=GBP
IC7, IC8 : AS4C16M16SA-6TCN Alliance Memory DRAM : https://www.mouser.com/ProductDetail/al ... cycode=GBP
U1, U2, U3, U4 : SN74CB3T3245PW TI Digital Bus Switch ICs : https://www.mouser.com/ProductDetail/te ... cycode=GBP
IC1 : MC68030RC50C : Motorola 68030 50Mhz : https://amigastore.eu/en/780-motorola-68030-50mhz.html
Regarding U5: The link at https://www.exxosforum.co.uk/atari/last/TF536/index.htm is just to the ROM https://www.exxosforum.co.uk/atari/store2/#0143. Can someone link me a good compatible socket?
Can I build this progressively? Basically, can I connect just the CPU, the CPLD, flash the CPLD via the JTAG, replace the 68000 in an STF and get it booting? Can I add the Alt-RAM, the buffers and the ROM later on? Do I need an external fast ROM like I did with my STF and the v1.5 booster if I don't use the onboard ROMs?
Regarding wiring, I assume ROM_CE solders to the 1M ROM_CE point on the motherboard? When is this needed? Where does the ACSI10 go to and when is it needed?
How are the BANK 0, 512K ROM and BANK 1 jumpers configured? I assume the CDIS and MMUDIS are Cache and MMU Disable and I don't really need to touch them except for debugging.
Install Procedure
Is this as simple as:
1) Perform mandatory fixes on ST motherboard.
2) Unsolder 68000 CPU
3) Install 64 pin socket.
4) Install TF536 Rev 5 in socket
5) Plug in JTAG programmer
6) Power on ST
7) Program CPLD.
8) Reboot ST
I gather that the CPLD can also be programmed outside of the ST if 5v is supplied to the PWR2 +5v line on the ST536.
Thanks in advance for any help, it will be much appreciated.
My goal is to install this board in to an Atari 520 STFM.
Here's what I've gathered so far:
STF536 Rev 5 : https://www.exxosforum.co.uk/atari/store2/#0220
PGA Socket : https://www.exxosforum.co.uk/atari/store2/#0181
IC3 : XC95144XL-5TQG144C Xilinx CPLD : https://www.mouser.com/ProductDetail/xi ... cycode=GBP
IC7, IC8 : AS4C16M16SA-6TCN Alliance Memory DRAM : https://www.mouser.com/ProductDetail/al ... cycode=GBP
U1, U2, U3, U4 : SN74CB3T3245PW TI Digital Bus Switch ICs : https://www.mouser.com/ProductDetail/te ... cycode=GBP
IC1 : MC68030RC50C : Motorola 68030 50Mhz : https://amigastore.eu/en/780-motorola-68030-50mhz.html
Regarding U5: The link at https://www.exxosforum.co.uk/atari/last/TF536/index.htm is just to the ROM https://www.exxosforum.co.uk/atari/store2/#0143. Can someone link me a good compatible socket?
Can I build this progressively? Basically, can I connect just the CPU, the CPLD, flash the CPLD via the JTAG, replace the 68000 in an STF and get it booting? Can I add the Alt-RAM, the buffers and the ROM later on? Do I need an external fast ROM like I did with my STF and the v1.5 booster if I don't use the onboard ROMs?
Regarding wiring, I assume ROM_CE solders to the 1M ROM_CE point on the motherboard? When is this needed? Where does the ACSI10 go to and when is it needed?
How are the BANK 0, 512K ROM and BANK 1 jumpers configured? I assume the CDIS and MMUDIS are Cache and MMU Disable and I don't really need to touch them except for debugging.
Install Procedure
Is this as simple as:
1) Perform mandatory fixes on ST motherboard.
2) Unsolder 68000 CPU
3) Install 64 pin socket.
4) Install TF536 Rev 5 in socket
5) Plug in JTAG programmer
6) Power on ST
7) Program CPLD.
8) Reboot ST
I gather that the CPLD can also be programmed outside of the ST if 5v is supplied to the PWR2 +5v line on the ST536.
Thanks in advance for any help, it will be much appreciated.