TF536 + 68000 relocator and ROM board project.
Posted: 24 Sep 2020 10:55
OK, seeing as I've decided to try to build this thing I thought a separate thread for the progress would be a good idea.
So, the primary aim of the project is to fit a TF536 into a 520STFM case and allow the top shield to be fitted normally.
In addition, it will have on-board a socket for an Exxos dual TOS ROM with a jumper to switch between the two ROMs, decode circuitry and jumpers to say whether the ROM image needs to be placed in the TOS 1.0{2,4} address range or the TOS 2.06 range. (I envisage that you'd use a jumper to set the ROM address range for each half of the ROM and then have trailing wires going to an external switch on the case.)
And yet more... use @derkom 's relocator design to also have the 68000 on the board so that you can switch between that and the TF536.
Having this all on one board makes things simpler for users as they "merely" have to replace the CPU with a socket, remove the ROMS, re-fit the CPU on the board along with a DualTOS ROM and they're away. They can then add the TF536 (or anything else) later.
From my initial investigation it looks feasible, at least space-wise.
(This next bit is for my own reference really)
With regards to the ROM decoding, due to the dual ROM switching I can't use exactly the decode system @DoG referenced, instead the address line decode can easily be done with a 16V8 GAL, outputting either one or another output high if one of the address ranges is being accessed, then a modified version of the circuitry DoG referenced can be used to do /CE and /DTACK.
For the old TOS, the line would be high if the top byte of the address is 11111101 or 11111110.
For TOS 2.x it's simpler as you just look for 111000xx, so you can ignore the bottom two lines.
So, the primary aim of the project is to fit a TF536 into a 520STFM case and allow the top shield to be fitted normally.
In addition, it will have on-board a socket for an Exxos dual TOS ROM with a jumper to switch between the two ROMs, decode circuitry and jumpers to say whether the ROM image needs to be placed in the TOS 1.0{2,4} address range or the TOS 2.06 range. (I envisage that you'd use a jumper to set the ROM address range for each half of the ROM and then have trailing wires going to an external switch on the case.)
And yet more... use @derkom 's relocator design to also have the 68000 on the board so that you can switch between that and the TF536.
Having this all on one board makes things simpler for users as they "merely" have to replace the CPU with a socket, remove the ROMS, re-fit the CPU on the board along with a DualTOS ROM and they're away. They can then add the TF536 (or anything else) later.
From my initial investigation it looks feasible, at least space-wise.
(This next bit is for my own reference really)
With regards to the ROM decoding, due to the dual ROM switching I can't use exactly the decode system @DoG referenced, instead the address line decode can easily be done with a 16V8 GAL, outputting either one or another output high if one of the address ranges is being accessed, then a modified version of the circuitry DoG referenced can be used to do /CE and /DTACK.
For the old TOS, the line would be high if the top byte of the address is 11111101 or 11111110.
For TOS 2.x it's simpler as you just look for 111000xx, so you can ignore the bottom two lines.