exxos's Atari, Amiga & retro forum

I've had it in mind for a while to use my RTC modules ( falcon) on the next board. The problem is it will need a pld to take care of the address decoding.

It would be (possibly) easier to add on the new booster design, but there isn't any room for starters. Plus the I don't want to force people to buy the boosterr to get the addons.

I can only think that having a pld under the dip 68000 like on the sec booster would be the way to do it. Pretty much that pld could do tos206 decoding , manage the ide port and rtc. Of course firmware for ide and rtc isn't done, but having the pld on board wired up ready can't hurt.

I could also make provisions for the "doubleST" booster logic. The idea is to just have some io pads as a breakout for the pld. Then as clock lines go via resistors, jumper wires can be added to the pld to do the mods.

Now I could route all the signals via the pld anyway, but if something goes wrong somewhere then it will cause problems. Not everyone may want to solder the pld for those features and not everyone has a programmer.

In some cases this pld would be better on its own expansion header. So I can program the chips for people , but of course its another io board I will have to design. So its not a ideal solution.

Altrea programmers are cheaper, and while I have run my ste booster on a alters chip, its a lot more work for me to convert to a new pld. So not ideal either.

The atmel programmers are about £60 , so not massive costs anyway. The sec booster uses atmel as well.

I'm thinking out loud mostly. I think adding the pld under the dip68000 socket is the way to go. With using a few jumper wires the old can be wired in that way. Then the pld isnt needed to get the board running as a stock machine either. I can make the rtc board and ide header on the motherboard and wire it to the pld ready, then work out the firmware another day.

I'm happy with whatever ideas you want to implement. Just wondering if it should be the step after next or not? Ie development and implementation time?

And remember it's something else for me to break then fix afterwards.

Forgottenmyname wrote: 16 Dec 2018 12:10 I'm happy with whatever ideas you want to implement. Just wondering if it should be the step after next or not? Ie development and implementation time?

I'm thinking a 2-3 steps ahead with it all. While its more work to add things onto this design, it will save work further down the line. I was going to develop the IDE on the STFM, but thats going to be another project in its own right (it will still get done at some point anyway) but adding a PLD and a header onto the MB now, is a lot easier than developing another PCB. The next steps in the board are the 16MHz booster, IDE, RTC.. so adding them onto "one board" is easier than developing 3 separate projects kinda thing.

So far I think we had like 5 people interested in this board, so I am also making assumptions that there may not be a "3rd board". So the "conclusion" of this board is everything talked about already, with provisions for IDE, RTC, 16MHz. The next step would be to finish the SEC booster which will fit on this board. So that's basically a years worth a work in total.

The idea of a "3rd board" would be integrated booster, but I am not sure what else. It would be nice to get the FPGA stuff running.. at least the blitter and integrate that onto the 3rd board. Though thats going to soak up a lot of time as well.. The main issue is the voltage interfacing logic, adding IO translators onto each chip isn't exactly a good mash up of hardware. But as blitters are hard to find, then it has some use for sure.

In terms of MMU, if it could run SRAM then its worthwhile adding , it could run at x4 speed with the CPU for a 32MHz system. Though of course its going to need a shifter to keep up as well. Replacing the GLUE would bring TOS206 built it, maybe some other stuff, but at this point in time, the MMU & BLITTER are the FPGA ones which need doing. As I know nothing about FPGA, I honestly think someone else should work on those projects.

There is things to develop like flash-tos and maybe some other projects i've forgotten about, so this is all going to keep me busy for a long time anyway.. Its pretty much looking like a 2-3 year time span to work towards a 3rd board.. How it is playing out in my mind, I think there probably won't be a 3rd board. But I can't predict what will happen that far ahead.

Forgottenmyname wrote: 16 Dec 2018 12:10 And remember it's something else for me to break then fix afterwards.

This is why I think its a good idea not to start routing stuff via the PLD and jumper link stuff instead. The current board is all the fixes, plus IO expansion headers basically. Though adding a PLD on board means bulk of work is already done for adding stuff, rather than a "tower of hack jobs" like we have now. These mods won't be needed to get the stock board working. So making provisions now is a good idea in my mind, a bit more work now, but going to save a lot of chaos in the future.

:dualthumbup:

exxos wrote: 16 Dec 2018 12:48

Forgottenmyname wrote: 16 Dec 2018 12:10 I'm happy with whatever ideas you want to implement. Just wondering if it should be the step after next or not? Ie development and implementation time?

I'm thinking a 2-3 steps ahead with it all. While its more work to add things onto this design, it will save work further down the line. I was going to develop the IDE on the STFM, but thats going to be another project in its own right (it will still get done at some point anyway) but adding a PLD and a header onto the MB now, is a lot easier than developing another PCB. The next steps in the board are the 16MHz booster, IDE, RTC.. so adding them onto "one board" is easier than developing 3 separate projects kinda thing.

Always got to be 2 or 3 steps ahead :D Keeps you on your toes and gives you purpose. The IDE breadboard version has stalled as weddings, Xmas shopping and preparations have got in the way. Finally have got my PC sorted so should be able to start back into the Atari swing of things this week.

exxos wrote: 16 Dec 2018 12:48 So far I think we had like 5 people interested in this board, so I am also making assumptions that there may not be a "3rd board". So the "conclusion" of this board is everything talked about already, with provisions for IDE, RTC, 16MHz. The next step would be to finish the SEC booster which will fit on this board. So that's basically a years worth a work in total.

The idea of a "3rd board" would be integrated booster, but I am not sure what else. It would be nice to get the FPGA stuff running.. at least the blitter and integrate that onto the 3rd board. Though thats going to soak up a lot of time as well.. The main issue is the voltage interfacing logic, adding IO translators onto each chip isn't exactly a good mash up of hardware. But as blitters are hard to find, then it has some use for sure.

In terms of MMU, if it could run SRAM then its worthwhile adding , it could run at x4 speed with the CPU for a 32MHz system. Though of course its going to need a shifter to keep up as well. Replacing the GLUE would bring TOS206 built it, maybe some other stuff, but at this point in time, the MMU & BLITTER are the FPGA ones which need doing. As I know nothing about FPGA, I honestly think someone else should work on those projects.

There is things to develop like flash-tos and maybe some other projects i've forgotten about, so this is all going to keep me busy for a long time anyway.. Its pretty much looking like a 2-3 year time span to work towards a 3rd board.. How it is playing out in my mind, I think there probably won't be a 3rd board. But I can't predict what will happen that far ahead.

Forgottenmyname wrote: 16 Dec 2018 12:10 And remember it's something else for me to break then fix afterwards.

At least you have a direction and people are right behind you. Also I am with Forgottenmyname, will be fun building and running through any issues in the next version.

exxos wrote: 16 Dec 2018 12:48 This is why I think its a good idea not to start routing stuff via the PLD and jumper link stuff instead. The current board is all the fixes, plus IO expansion headers basically. Though adding a PLD on board means bulk of work is already done for adding stuff, rather than a "tower of hack jobs" like we have now. These mods won't be needed to get the stock board working. So making provisions now is a good idea in my mind, a bit more work now, but going to save a lot of chaos in the future.

It will be with a little bit of sadness to see the sky scraper view of the first board go but the amazing work you and all the testers have done have paved the way to the next chapter.

Icky wrote: 16 Dec 2018 18:21 Always got to be 2 or 3 steps ahead :D Keeps you on your toes and gives you purpose. The IDE breadboard version has stalled as weddings, Xmas shopping and preparations have got in the way. Finally have got my PC sorted so should be able to start back into the Atari swing of things this week.

No worries, life tends to get in the way of stuff :)

Icky wrote: 16 Dec 2018 18:21 At least you have a direction and people are right behind you. Also I am with Forgottenmyname, will be fun building and running through any issues in the next version.

Hopefully it will work first time, but probably not :lol:

Icky wrote: 16 Dec 2018 18:21 It will be with a little bit of sadness to see the sky scraper view of the first board go but the amazing work you and all the testers have done have paved the way to the next chapter.

Yeah, the board is almost obsolete now the bulk of the research and patches are done. I want to make this next board a bit more future proof and something which can be used in a real machine for years to come.

What about our original RTC clock based on the Forget Me Clock II? It's a single chip and requires only a small number of connections to the ROM port, which I'm sure would be quite easy to integrate into the design, as the DS1315 is only a small 16 pin dip package.

Unless of course the Falcon module is offering other features not available with just the DS1315?

rubber_jonnie wrote: 17 Dec 2018 09:35 What about our original RTC clock based on the Forget Me Clock II? It's a single chip and requires only a small number of connections to the ROM port, which I'm sure would be quite easy to integrate into the design, as the DS1315 is only a small 16 pin dip package.

Unless of course the Falcon module is offering other features not available with just the DS1315?

Falcon one has has easier access to its internal RAM. Ultimately I want to use the NVRAM to store settings for the booster.

I touched on the inital idea here https://www.exxosforum.co.uk/forum/viewt ... =373#p2443 but was going to use the EPROM in the ATTINY to store the settings, but with the falcon's RTC, it has its own user ram free to use.

I guess I could just put that 1315 on the port anyway I guess...

Yeah, I remember seeing that thread. I had guessed that you may have other options in mind with the Falcon chip.

It would be quite easy to add a DS1315 though, not many connections.........

;)

rubber_jonnie wrote: 17 Dec 2018 10:28 It would be quite easy to add a DS1315 though, not many connections.........

Hint taken ;) I can add it on.