exxos's Atari, Amiga & retro forum

That's a really good finding!

Well, I cleared the bench and put the PiStorm back into the ST... I think it's broken. I can't get it to pass any of the ataritest stuff with writing and reading from memory completely unreliable.

Checking with the 'scope the address bus lines seem to being driven OK, though they never get above 3.5V. The data bus all seems to look OK, just as noisy as ever. All the signals seem to be sane and the same on the PiSTorm pins and the 68000 next to it.

Probably time to give up on that then.

Not giving up completely, are you? :o

As soon as I finish my STacy upgrades and get it back together (and working - that would be nice!),
I'm going to socket a 2nd STacy motherboard that I have and set it up again for PiSTorm testing.

Success sure seems to be a long way off at this point in time but hey, one never knows... :)

Don't give up while Cryptodad keeps working on it even under his circumstances!

It seems that the Exxos/Badwolf STE PiStorm is an order of magnitude more stable than the standard A500 Rev.B one.

Then again, people who are having successes all seem to have an IMP chipset in their ST/STE.

Well, that doesn't look good... The bottom trace is /AS and the top A1...


This is while the ataritest program tries to clear memory. Basically it's changing the address whilst (a) having /AS still asserted and, (b) the data on the bus may or may not be changing. It's amazing that it works at all for some people.

This is going down one of these rabbit holes where you need a fully wired 68000 logic analyser set-up to see just what's going wrong.

P.S. It seems that the ataritest program is also blindly writing/reading from memory and ignoring /DTACK. When 'scoping /DTACK quite often the line would go low about 2/3rds or 3/4trs of the way through the /AS assertion and hence if this is assuming that it writing to memory it's not during a lot of those changes to the address bus.

ataritest doesn't blindly read/write as you put it. The reads and writes follow the firmware state machine just as the emulator does.
DTACK assertion will vary; it depends upon the speed of the RAM/ROM. AS is asserted once the emulator (or ataritest) has setup the address, and only then, does the state machine proceed. Unfortunately, this can lead to longer bus-cycles if the Pi is distracted shall we say.

I have looked at your AS monitoring, and it has occurred to me that there is a problem with how the PiSTorm puts the address on the Atari bus, or more to the point, when it puts the address on the bus. So I have reworked that and a firmware has been uploaded on the Discord channel for you try if you wish.

Thanks for that, I obviously misinterpreted what you said earlier in the week when you said that it didn’t use the full bus cycle as the emulator wasn’t running.

I’ll try the new firmware when I can. I’m unfortunately out all day today and so won’t be able to look at it.

stephen_usher wrote: 06 Oct 2024 07:48 Thanks for that, I obviously misinterpreted what you said earlier in the week when you said that it didn’t use the full bus cycle as the emulator wasn’t running.

I’ll try the new firmware when I can. I’m unfortunately out all day today and so won’t be able to look at it.

Yeah you're right. I did say that. :oops: What I should have said is ataritest doesn't care about interrupts and bus errors - it simply reads/writes Atari memory. So for raw speed, ataritest will give it.