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Re: ReAgnus Board (Design Complete)
Posted: 06 Sep 2022 21:45
by exxos
What FPGA is that then ? Assume it must have 5V tolerant IO ports or something as @terriblefire original had buffers on it.
Re: ReAgnus Board (Design Complete)
Posted: 06 Sep 2022 22:53
by Gooeyblob
ICE65l04f-tcb132c from the schematics.
Re: ReAgnus Board (Design Complete)
Posted: 07 Sep 2022 06:23
by alexh
Doesn't say 5v tolerant in the datasheet
Re: ReAgnus Board (Design Complete)
Posted: 07 Sep 2022 08:55
by cmorley
alexh wrote: 07 Sep 2022 06:23
Doesn't say 5v tolerant in the datasheet
The absolute max ratings near the end of the datasheet say 5.5v for (most of) the IO.
Re: ReAgnus Board (Design Complete)
Posted: 07 Sep 2022 09:26
by exxos
Re: ReAgnus Board (Design Complete)
Posted: 07 Sep 2022 10:16
by Gooeyblob
Banks 0,1 and 2 are 5v tolerant, bank 3 will interface with the 3.3v 4MB PSRAM x 2 ...