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Re: DFB1 FPU experiment thread

Posted: 04 Feb 2023 14:52
by exxos
Badwolf wrote: 03 Feb 2023 15:18 But also: how long's a piece of string. The value that works on your board is the right one. ;)
+1 Absolutely. 50mhz speeds need very tight timing tolerances. What fixes one board could also break another. Simply swapping any main part like the PLD or CPU can affect things.

It can lead people down the wrong path at times. For example, a suspect faulty PLD which is changed and the board now functions could actually be a faulty PLD, bad soldering, or tolerances changed enough to solve the problem, in which case the PLD might not actually be faulty at all. 1ns in the wrong place and it's game over.

Re: DFB1 FPU experiment thread

Posted: 05 Feb 2023 11:27
by Steve
@exxos I don't really understand how the entire system is so specific in timing tolerances when it comes to this kind of accelerator. I assumed that the CPU is supposed to run kind of asynchronously to the system, providing results faster/slower depending on clock speed? For instance on a ct60e you can set the CPU speed in software and it'll just function at whatever you want, with absolutely no change to system stability. Is it just a fundamental difference in how these boosters operate?

Re: DFB1 FPU experiment thread

Posted: 05 Feb 2023 11:41
by foft
I guess the other boosters are more controlled since they have a dedicated fast bus, rather than connecting data and address lines to the long falcon bus all the time?

Though that seems fine for the cpu and ttram, so not sure why it’s only an issue for the fpu.