Re: TF CD32 Riser Revision 2 Design Complete
Posted: 28 Nov 2020 15:51
Will adjust that a bit.
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Thank you. :)
Yeah the CPLD can go down to a 36 no problem. I had envisioned it might do more stuff but really its just an address decoder. Keep the ARM big though. There is soundcard potential there too.arkadiusz.makarenko wrote: 29 Nov 2020 11:44 Looking at current project I can downgrade project from Stm32f722 to stm32f730. It is half the price, and there would still be like 15-20k left in flash for any potential upgrade.
I will have a look at cpld as well it might be possible to downgrade it from 72 to 36 cells, but it wouldn't have any potential to grow at all. So need to think about that one.
EDIT
CPLD - I take it back, I use 18 cells at this moment, so there would still be another half of the chip to use. Plenty space as at this point it would be used only really to decode few other addresses.
I will take my time to review it, but at this moment I think the only difference is in size of flash memory. RAM on both chips is the same. Initially firmware growth was substantial due to usb stack and usb libraries,now it is much slower.terriblefire wrote: 29 Nov 2020 12:03Yeah the CPLD can go down to a 36 no problem. I had envisioned it might do more stuff but really its just an address decoder. Keep the ARM big though. There is soundcard potential there too.arkadiusz.makarenko wrote: 29 Nov 2020 11:44 Looking at current project I can downgrade project from Stm32f722 to stm32f730. It is half the price, and there would still be like 15-20k left in flash for any potential upgrade.
I will have a look at cpld as well it might be possible to downgrade it from 72 to 36 cells, but it wouldn't have any potential to grow at all. So need to think about that one.
EDIT
CPLD - I take it back, I use 18 cells at this moment, so there would still be another half of the chip to use. Plenty space as at this point it would be used only really to decode few other addresses.
Since you are already implementing most of the clockport ... maybe emulate a clockport sound card..arkadiusz.makarenko wrote: 29 Nov 2020 13:54I will take my time to review it, but at this moment I think the only difference is in size of flash memory. RAM on both chips is the same. Initially firmware growth was substantial due to usb stack and usb libraries,now it is much slower.terriblefire wrote: 29 Nov 2020 12:03
Yeah the CPLD can go down to a 36 no problem. I had envisioned it might do more stuff but really its just an address decoder. Keep the ARM big though. There is soundcard potential there too.
Currently there is about 30-35k taken (25k ? with size optimalization) F730 wouls still have like 25-30k flash left for growth.
Ps. Soundcard any more details, please?
I wasn't aware that there are clockport soundcards...terriblefire wrote: 29 Nov 2020 15:00Since you are already implementing most of the clockport ... maybe emulate a clockport sound card..arkadiusz.makarenko wrote: 29 Nov 2020 13:54
I will take my time to review it, but at this moment I think the only difference is in size of flash memory. RAM on both chips is the same. Initially firmware growth was substantial due to usb stack and usb libraries,now it is much slower.
Currently there is about 30-35k taken (25k ? with size optimalization) F730 wouls still have like 25-30k flash left for growth.
Ps. Soundcard any more details, please?
There are 2 DACs on the arm that come out to that 3 pin header....
I'd need to dig into the details of how those soundcards work for more ideas.
Now I get it. MP3 De-Codecs only are like 50k.terriblefire wrote: 29 Nov 2020 12:03 Keep the ARM big though. There is soundcard potential there too.