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Re: stween's build

Posted: 30 Nov 2022 09:33
by exxos
So ROM CE should be low... I don't get it.

/AS is also low on glue ?

What do you have on the ROMx pins on GLUE ? one of them at least should be low.

Re: stween's build

Posted: 30 Nov 2022 14:46
by stween
I'll sit with it for a while and take a more systematic snapshot of various pins with, say, addresses 0x000000 and 0xfc0000, and probably the state of things when the halt state hits on the CPU. I'll hopefully get to that at the weekend!

Re: stween's build

Posted: 30 Nov 2022 14:54
by exxos
stween wrote: 30 Nov 2022 14:46 I'll sit with it for a while and take a more systematic snapshot of various pins with, say, addresses 0x000000 and 0xfc0000, and probably the state of things when the halt state hits on the CPU. I'll hopefully get to that at the weekend!
As you can decode address zero, ROM2 must be fine. So at this point I can only assume a broken line from glue ROM1,ROM3 to the AND gate near the ROM jumper above the top 68k expansion port.

Re: stween's build

Posted: 11 Dec 2022 04:53
by stween
exxos wrote: 30 Nov 2022 14:54
stween wrote: 30 Nov 2022 14:46 I'll sit with it for a while and take a more systematic snapshot of various pins with, say, addresses 0x000000 and 0xfc0000, and probably the state of things when the halt state hits on the CPU. I'll hopefully get to that at the weekend!
As you can decode address zero, ROM2 must be fine. So at this point I can only assume a broken line from glue ROM1,ROM3 to the AND gate near the ROM jumper above the top 68k expansion port.
Alright, so:

When selecting address 0x000000:
  • on the glue, ROM2 is low, and the other ROM pins are high
  • BERR is bouncing high/low pretty consistently at around 62kHz
  • DTACK is low
  • AS is low
  • on TOS, ROM_CE is low
  • data lines look correct
When selecting address 0xfc0000:
  • on the glue, all ROM pins are high
  • BERR is bouncing high/low pretty consistently at around 62kHz
  • DTACK is low
  • AS is low
  • on TOS, ROM_CE is high
  • data lines all high
There's a little 6-pin chip next to the glue and the unoccupied SMT glue slot; is that the AND gate? Seems to fit with IC11 on the schematics, and the pins on that match the readings above.

Re: stween's build

Posted: 11 Dec 2022 11:13
by exxos
So you can decode address zero but not FC00000 , So check address on GLUE itself is correct...

It just seems like you are missing a logic high on the address bus on the GLUE. Either missing pull up, or bad connection.

Re: stween's build

Posted: 11 Dec 2022 11:19
by exxos
stween wrote: 13 Nov 2022 04:38 [*] bus shorts: all pairs of pins look good EXCEPT between 20+21 (E and VPA?), which read 0 ohms.
Did you ever look into that problem ?

Re: stween's build

Posted: 11 Dec 2022 15:16
by stween
exxos wrote: 11 Dec 2022 11:13 So you can decode address zero but not FC00000 , So check address on GLUE itself is correct...
Yup, when I set 0xfc0000, pins 6 -- 11 on the glue (A18 -- A23) are high, all others address pins are low.
exxos wrote: 11 Dec 2022 11:19
stween wrote: 13 Nov 2022 04:38 [*] bus shorts: all pairs of pins look good EXCEPT between 20+21 (E and VPA?), which read 0 ohms.
Did you ever look into that problem ?
Eyeballing this again (I don't know what to do with this one):

Maybe I was off by one when I counted, because today the ranger on my oscilloscope measures over 2M ohms between 20 (E) and 21 (VPA)

But between 19 (VMA) and (E), I read 0.

Re: stween's build

Posted: 11 Dec 2022 16:23
by exxos
Without power , do ROMx lines measure short to 5v ?

I don't understand how GLUE gets correct address but does not set any ROMx pins low.. I assume all ROMx from GLUE to the AND gate are connected ?

Do you see any low ROMx lines low on GLUE on FC0000 ?

Re: stween's build

Posted: 11 Dec 2022 19:22
by stween
exxos wrote: 11 Dec 2022 16:23 Without power , do ROMx lines measure short to 5v ?
No. With the PSU disconnected I measured resistance between those pins and an exposed 5V pad, and the resistance is like 23M ohm for all of them. ROM_CE from the ROM to 5V measures 4.7k ohm.
I assume all ROMx from GLUE to the AND gate are connected ?
Assuming the little 6-pin chip (IC11) with ROM0,1,2 marked into it in the schematic: I have continuity between the GLUE and that chip for ROM0, 1, and 2 (pins 19, 20, 21 on the GLUE and pins 1, 3, 6 on the little chip respectively).
Do you see any low ROMx lines low on GLUE on FC0000 ?
Nope. ROM0 through ROM4 are high on 0xfc0000.
I don't understand how GLUE gets correct address but does not set any ROMx pins low..
If you don't, then I sure don't :lol:
stween wrote: 11 Dec 2022 15:16 But between 19 (VMA) and (E), I read 0.
Is this significant, or is this normal?

Re: stween's build

Posted: 11 Dec 2022 20:49
by exxos
stween wrote: 11 Dec 2022 19:22 But between 19 (VMA) and (E), I read 0.
Is this significant, or is this normal?
That is not normal no. I think all the address lines seem OK, but VMA and E should not be shorted. But finding the short could be a problem..

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