Re: TF1260 Firmware Update ... er Update?
Posted: 09 Aug 2021 11:55
Right i spent a good bit of yesterday on the firmware... I've been removing the clock switch trick and dealing with the resulting things that have popped up.
I had an issue with IACK not working until i realised I'd set the 060 to ignore the TA for 2 clocks. I changed that to 1 and its fine and faster.
I had an issue with lockups in the slave state machine.. thats been resolved.
I got the firmware from floppy and started looking at chipram performance. I've managed to get some gains here.. Basically the Amiga is pretty crap.. if your cycles have a gap between them it doesnt respond in a timely way... I started with
I trimmed off a bit of fat at the start of the cycle and got to this...
You can see most of the time is spent waiting for the Amiga... ROM cycles are pretty good but Chipram slot allocation is nasty. If you go over the slot time it seems your bandwidth will half because you missed where the amiga wants you to start a slot. Now i need to get a little bit more off the tail end of the cycle and we're good.
Final thing to deal with is the fastmem <-> chip transition.. I get a lockup at the moment. I know why i just need inspiration to solve it.
I had an issue with IACK not working until i realised I'd set the 060 to ignore the TA for 2 clocks. I changed that to 1 and its fine and faster.
I had an issue with lockups in the slave state machine.. thats been resolved.
I got the firmware from floppy and started looking at chipram performance. I've managed to get some gains here.. Basically the Amiga is pretty crap.. if your cycles have a gap between them it doesnt respond in a timely way... I started with
I trimmed off a bit of fat at the start of the cycle and got to this...
You can see most of the time is spent waiting for the Amiga... ROM cycles are pretty good but Chipram slot allocation is nasty. If you go over the slot time it seems your bandwidth will half because you missed where the amiga wants you to start a slot. Now i need to get a little bit more off the tail end of the cycle and we're good.
Final thing to deal with is the fastmem <-> chip transition.. I get a lockup at the moment. I know why i just need inspiration to solve it.