exxos's Atari, Amiga & retro forum

8 Bit Dreams wrote: 19 Mar 2019 21:47 Maybe You messed up pinout since plcc is upside down!? Please double check!

I checked, double checked and triple checked when I created the footprint. And measured from the DIP64 socket to the A600 main board when I got the PCBs, so I really don’t think that’s it. But I’ve been wrong before :)

Some traces I couldn’t really measure as I had the mb inside the case, but still. It _should_ be ok.

Unfortunately i can't be much help to You, don't even have any memory expansion except 1MB trapdoor Chip RAM + RTC to test Your adapter with...

8 Bit Dreams wrote: 19 Mar 2019 21:53 Unfortunately i can't be much help to You, don't even have any memory expansion except 1MB trapdoor Chip RAM + RTC to test Your adapter with...

Hopefully someone can help me figure it out. Or figure it out themselves and get all the glory, I don’t care. As long as we get a working open source solution for hijacking the A600 CPU in the end :)

kludge wrote: 19 Mar 2019 21:03 Since I don't have a TF53x going quite yet I had to test with a regular 68k DIP64. Tied the A600 68k BR and BGACK to ground, and nothing happened. Did the same thing earlier but with the "2 wire method" instead of the "3 wire method" so then I only asserted BR. The results were the same, though.

Now I tried reseting the DIP64 68k manually as well, but still nothing. Maybe the DIP 68k needs to have its BG and BGACK pulled high? Right now they are floating, because I'm lazy.

Sorry, trying to understand the problem..

The BR and BGACK are both of the 68k and isolated from the new cpu?, are there pullups/downs on the new cpu?
The Reset and HLT of the 68k are tied to the new cpu?

Just to be sure:
1. You asserted reset and hlt of the 68K and you tied BR and BGACK to ground
2. You de-asserted reset and hlt.

Reset and HLT should not be tied together as this could cause problems.

If i read this correctly all bus arbitration lines need to be tied to vcc or gnd accordingly through individual resistors as they otherwise could cause glitches and crashes..., if you disconnect any pin from the mainboard you have to do this yourself.

Maximilian wrote: 20 Mar 2019 01:18 Sorry, trying to understand the problem..

The BR and BGACK are both of the 68k and isolated from the new cpu?, are there pullups/downs on the new cpu?
The Reset and HLT of the 68k are tied to the new cpu?

Just to be sure:
1. You asserted reset and hlt of the 68K and you tied BR and BGACK to ground
2. You de-asserted reset and hlt.

Reset and HLT should not be tied together as this could cause problems.

If i read this correctly all bus arbitration lines need to be tied to vcc or gnd accordingly through individual resistors as they otherwise could cause glitches and crashes..., if you disconnect any pin from the mainboard you have to do this yourself.

I didn't connect BR/BG/BGACK to anything on the DIP64 this time, but I will try pulling BG/BGACK high on the DIP64. BR should be fine left floating I think.

Reset and halt are connected all the way through from the A600 motherboard. Do I need to assert them? Then they will reset both CPUs at the same time, but that is done automatically during power on anyway, right? Or do I need to reset the DIP64 CPU independently from the A600 CPU somehow?

The TF530 and a plain 68K will stop if BGACK is low. Those can’t be left floating.

terriblefire wrote: 20 Mar 2019 12:28 The TF530 and a plain 68K will stop if BGACK is low. Those can’t be left floating.

:thanksblue:

Mkay... A600 BR & BGACK held low and DIP64 BG & BGACK held high at least gives me something. A lot of different colors :)

The last one (30s in) is quite interresting, though.

Also, I checked the pinout once again. Seems correct. Unless I'm stupid.