exxos's Atari, Amiga & retro forum

exxos wrote: 31 Oct 2023 18:58 Anyway, time for putting.…

Thought you had taken up golf then for a minute.

Icky wrote: 31 Oct 2023 19:28

exxos wrote: 31 Oct 2023 18:58 Anyway, time for putting.…

Thought you had taken up golf then for a minute.

Voice recognition and sinus troubles don't mix :lol: :roll:

So the slide on the site in this project is the header pins soldering joints (next to CPU ) make it impossible to level up this board. It is only a fraction out and if I built another one I would probably cut the pins first..

Anyway... Place your bets will it work or not...

So testing the FPUs basically equates to a 50% failure rate so far. Those ones which failed, I grabbed a couple random ones and they work fine at 16mhz . But I've had this problem before. There must be actual 16mhz only parts and they all being restamped as 40mhz. No great suprise really.

The ones which work are a mixed bag of 40mhz and 50mhz parts so far. So good all this effort is finally filtering out the FPUs which actually run at 50mhz.

I've got some custom stickers made for them. They will be stamped as 16,40,50MHz on the sticker and priced accordingly when they go into the store.

So 54 out of 100 tested do not work at 40MHz. About 25 work at 40MHz and 50MHz. The ones which failed, I tested a couple and they work at 16MHz. So they are likely re-badged 16MHz parts.. Shocking isn't it. So onto the weekly dispute it is then.

This is always the problem. The seller never knows if the parts or crap or not. I mean yeah I assumed this would happen, it always does. Seems bad to punish the seller just because China suppliers want to sell fake goods :roll:

So 53ish FPUs which are hopefully 16MHz parts and not faulty.


I can't seem to use the FPU on the DFB1X while the board is disabled :( So had to get a bit creative to test them in the Falcon FPU socket :lol:

Results are in! So the alleged MC68882FN40A FPU tests are...

50mhz - 20
40mhz - 26
16mhz - 30
Faulty - 24

Make of that what you will. But basically 54 out of 100 were "bad" and just 20 were overclockable for 50mhz.

It seems a little bit counterproductive somehow, in that the 16 megahertz parts I will be selling are the cheapest and yet they take the longest to test! :lol: :roll:

Got my STE back on my bench to look at the DMA issues with some STEs when using the STE booster. Can't believe 6 months went by already since I last looked at it! viewtopic.php?p=100673#p100673

So to round up, the STE functions fine with a HC CPU and no hard drive corruption etc. However when the booster is in place it inherently ends up delaying the 8MHz clock by about 10ns in total. Then seems to bring back the DMA issues. However this problem seems very rare and in all the years I have been producing the booster I have not seen such issues until more recently. With various other research into timing problems on the STE, it is pretty much seems to be simply bad luck what machines have what timing problems and how severe.

Now this is speculation but, but I believe the HC CPU has faster reaction times for the busgrant signals ,it generally solves the DMA related issues. However, when the clock is buffered, it then ends up delaying the bus grant signals which then inherently "undo" what it originally fixed. Unfortunately advancing the 8 MHz clock by about 10ns is no simple task. I went through various iterations of trail and error until I got them back in sync again.


So basically now, despite the delays in the GAL logic and buffers, the CPU timings are now identical to a stock CPU again. I'm not going to try the hard drive at this point because I really need to design a better more stable circuit than I currently have.

The CMOS part would be slightly faster to react to a rising signal as the transition voltage between 0 and 1 is lower for CMOS and hence it would trigger at a different point. Basically the CPU would see the transition to 0 later than the NMOS part and the transition to 1 earlier by a nanosecond or so.

In other words the STE's timing only just about works by accident.