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Re: A500 plus black screen

Posted: 14 Aug 2024 13:14
by Steve_w
its an A500+ rev 8.

BERR is always high at 4.96v

Re: A500 plus black screen

Posted: 14 Aug 2024 13:42
by terriblefire
What about HALT?

Re: A500 plus black screen

Posted: 14 Aug 2024 13:55
by stephen_usher
I missed that it was a Plus... Battery damage?

The bus transceivers are right in the firing line of the battery, so I would suspect them for a start... But that shouldn't stop the ROM from working as that's directly on the main address and data bus.

I think that you said that you checked continuity between the ROM address lines and data lines to the CPU, but I'd check them again. Also to GARY.

Does /ROMEN on GARY go low and is it seen to go low on the ROM as well?

Re: A500 plus black screen

Posted: 14 Aug 2024 14:07
by Steve_w
terriblefire wrote: 14 Aug 2024 13:42 What about HALT?
HALT is high

Re: A500 plus black screen

Posted: 14 Aug 2024 14:25
by Steve_w
stephen_usher wrote: 14 Aug 2024 13:55 I missed that it was a Plus... Battery damage?

The bus transceivers are right in the firing line of the battery, so I would suspect them for a start... But that shouldn't stop the ROM from working as that's directly on the main address and data bus.

I think that you said that you checked continuity between the ROM address lines and data lines to the CPU, but I'd check them again. Also to GARY.

Does /ROMEN on GARY go low and is it seen to go low on the ROM as well?
There has been battery damage, I've socketed and replaced the data path logic chips and repaired broken traces.

I'm wondering if there is an intermittent problem, maybe around GARY as probing ROMEN on power on I could see activity for about 3 seconds then nothing. Subsequently on power up ROMEN is now just high with no activity.

Re: A500 plus black screen

Posted: 14 Aug 2024 17:09
by stephen_usher
Have you replaced the Gary socket? Commodore single wipe sockets seem very unreliable.

Re: A500 plus black screen

Posted: 14 Aug 2024 19:16
by Steve_w
stephen_usher wrote: 14 Aug 2024 17:09 Have you replaced the Gary socket? Commodore single wipe sockets seem very unreliable.
No, I had removed it and repaired corrosion to traces, but put the dual wipe socket back.

As the issue looks a bit intermittent (I have seen some activity briefly) I'm tending to think it might be an issue like a socket and Gary deals with these initial control signals, so have removed it from the board and will replace with a new one.

Re: A500 plus black screen

Posted: 15 Aug 2024 12:43
by terriblefire
IMHO its not worth trying to fix a battery damaged A500+. Transplant everything over to an ReA500 or A500++.

I know people disagree but it will be a never ending rabbit hole of repairs and you can never be sure all the acid is neutralised.

Re: A500 plus black screen

Posted: 15 Aug 2024 18:28
by Steve_w
Hi,

I like to try and save them where I can, I have repaired nearly 30 boards, this one is proving to be a bit of trouble though. There was some low level corrosion, but that has been cleaned, tinned, tested and UV solder mask applied.

I replaced the socket with a brand new one, the issue still persists.

I'd like is possible to try and hunt down the issue with help from people here as I think its a great learning experience, I lack knowledge of the order of signals firing and what generates the signals. It may not be a simple as this but if I start at the beginning and work through logically I should be able to come to a positive outcome.

Steps with Diagrom installed
1. reset signals applied, driven from RESET circuit.
2. ?? does CPU then try and so things using /AS, UDS, LDS, etc ??
3. ROM code read, serial output works (assuming a working 1488 IC), OVL set
4. Screen colours then indicate issue, or diagrom indicates RAM issues with horizontal bars.

I think once step 3 is achieved it gets a bit easier to troubleshoot using diagrom, just need to get there.

Re: A500 plus black screen

Posted: 15 Aug 2024 18:53
by stephen_usher
The sequence is:
  • Reset goes high.
  • CPU then does four read cycles of 16 bit words starting at address 0x0 and incrementing the address each time.
  • CPU uses this information to read the first instruction from the address read from the first four reads and begin execution.
A simple 16 bit read cycle would be:
  • Put the address on the address bus.
  • Set R/W to read.
  • Lower /AS (Address Strobe) to tell the system that there's a valid address on the address bus.
  • Wait for /DTACK (DaTa ACKnowledge) to go low, telling the CPU that the data on the bus is ready.
  • Read the data from the data bus.
  • Raise /AS.
  • Wait for /DTACK to go back up.
Because it's a 16 bit read /UDS and /LDS aren't asserted. See: https://www.muchen.ca/documents/CPEN412 ... ure-2.html

By the way, you should read the thread about the Falcon with a black screen... Some of the last tests with the ROM removed may be useful for your diagnosis too.